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authorSiarhei Siamashka <siarhei.siamashka@gmail.com>2016-03-29 17:29:10 +0200
committerHans de Goede <hdegoede@redhat.com>2016-04-01 09:52:28 +0200
commitd96ebc468d0dff6eb6f069bba03b3f0e33aa22de (patch)
treebea23e84de4e9fd04545a5b8c384fd4b13081229 /include/configs
parent0ea5a04fbcd72ebb37eb4b3f744374fdf551d3b7 (diff)
sunxi: Add support for Allwinner A64 SoCs
The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/sun50i.h25
-rw-r--r--include/configs/sun6i.h1
-rw-r--r--include/configs/sun7i.h1
-rw-r--r--include/configs/sun8i.h2
-rw-r--r--include/configs/sunxi-common.h21
5 files changed, 44 insertions, 6 deletions
diff --git a/include/configs/sun50i.h b/include/configs/sun50i.h
new file mode 100644
index 0000000000..0fdb4c7b99
--- /dev/null
+++ b/include/configs/sun50i.h
@@ -0,0 +1,25 @@
+/*
+ * Configuration settings for the Allwinner A64 (sun50i) CPU
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * A64 specific configuration
+ */
+
+#define CONFIG_SUNXI_USB_PHYS 1
+
+#define COUNTER_FREQUENCY CONFIG_TIMER_CLK_FREQ
+#define GICD_BASE 0x1c81000
+#define GICC_BASE 0x1c82000
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include <configs/sunxi-common.h>
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
index 93863b59bc..95ccc35708 100644
--- a/include/configs/sun6i.h
+++ b/include/configs/sun6i.h
@@ -25,7 +25,6 @@
#define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
-#define CONFIG_TIMER_CLK_FREQ 24000000
/*
* Include common sunxi configuration where most the settings are
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index 56101a9ffc..0dd29029b9 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -22,7 +22,6 @@
#define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
-#define CONFIG_TIMER_CLK_FREQ 24000000
/*
* Include common sunxi configuration where most the settings are
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index eb5db4eb16..bf1b740b18 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -40,8 +40,6 @@
#endif
#endif
-#define CONFIG_TIMER_CLK_FREQ 24000000
-
/*
* Include common sunxi configuration where most the settings are
*/
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index a3994e1a6a..8f11eb90c1 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -56,6 +56,7 @@
/* CPU */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_SYS_CACHELINE_SIZE 64
+#define CONFIG_TIMER_CLK_FREQ 24000000
/*
* The DRAM Base differs between some models. We cannot use macros for the
@@ -90,7 +91,7 @@
#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
-#ifdef CONFIG_MACH_SUN9I
+#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
/*
* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
* slightly bigger. Note that it is possible to map the first 32 KiB of the
@@ -99,7 +100,7 @@
* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
#else
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
@@ -188,8 +189,16 @@
#define CONFIG_SPL_BOARD_LOAD_IMAGE
+#if defined(CONFIG_MACH_SUN9I)
+#define CONFIG_SPL_TEXT_BASE 0x10020 /* sram start+header */
+#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* ? KiB on sun9i */
+#elif defined(CONFIG_MACH_SUN50I)
+#define CONFIG_SPL_TEXT_BASE 0x10020 /* sram start+header */
+#define CONFIG_SPL_MAX_SIZE 0x7fe0 /* 32 KiB on sun50i */
+#else
#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
+#endif
#define CONFIG_SPL_LIBDISK_SUPPORT
@@ -197,14 +206,22 @@
#define CONFIG_SPL_MMC_SUPPORT
#endif
+#ifndef CONFIG_ARM64
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
+#endif
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
+#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
+/* FIXME: 40 KiB instead of 32 KiB ? */
+#define LOW_LEVEL_SRAM_STACK 0x00018000
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+#else
/* end of 32 KiB in sram */
#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+#endif
/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \