diff options
| author | Stephen Warren <swarren@nvidia.com> | 2016-06-17 09:43:58 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-06-19 17:05:55 -0600 |
| commit | 89c1e2da78f82a09685006291ce8bb44f635fa25 (patch) | |
| tree | 4962e19a65e7cf8caf997ee92ec16030dead512a /include/dm/uclass-id.h | |
| parent | 0f67e2395be44db2c1bef17b6ada2e46221908ed (diff) | |
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.
This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.
The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/dm/uclass-id.h')
| -rw-r--r-- | include/dm/uclass-id.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 0777cbe27e..b768660e85 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -63,6 +63,7 @@ enum uclass_id { UCLASS_PWRSEQ, /* Power sequence device */ UCLASS_REGULATOR, /* Regulator device */ UCLASS_REMOTEPROC, /* Remote Processor device */ + UCLASS_RESET, /* Reset controller device */ UCLASS_RTC, /* Real time clock device */ UCLASS_SERIAL, /* Serial UART */ UCLASS_SPI, /* SPI bus */ |