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| author | Tom Rini <trini@konsulko.com> | 2017-12-11 17:05:43 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-12-11 17:05:43 -0500 |
| commit | 6f1ee8a4bf72d4824cea25849f775ab487ddd579 (patch) | |
| tree | 9d4f6ad7ca865c4b7a01f3b0ebd19c047cf6230d /include/dt-bindings/clock/snps,hsdk-cgu.h | |
| parent | 335f7b1290ce24a729a9689a1db834c743226ca8 (diff) | |
| parent | e80dac0ab83ccb1d54e2d91b93d27b54a7f6544f (diff) | |
Merge git://git.denx.de/u-boot-arc
Diffstat (limited to 'include/dt-bindings/clock/snps,hsdk-cgu.h')
| -rw-r--r-- | include/dt-bindings/clock/snps,hsdk-cgu.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/snps,hsdk-cgu.h b/include/dt-bindings/clock/snps,hsdk-cgu.h new file mode 100644 index 0000000000..813ab71531 --- /dev/null +++ b/include/dt-bindings/clock/snps,hsdk-cgu.h @@ -0,0 +1,40 @@ +/* + * Synopsys HSDK SDP CGU clock driver dts bindings + * + * Copyright (C) 2017 Synopsys + * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __DT_BINDINGS_CLK_HSDK_CGU_H_ +#define __DT_BINDINGS_CLK_HSDK_CGU_H_ + +#define CLK_ARC_PLL 0 +#define CLK_ARC 1 +#define CLK_DDR_PLL 2 +#define CLK_SYS_PLL 3 +#define CLK_SYS_APB 4 +#define CLK_SYS_AXI 5 +#define CLK_SYS_ETH 6 +#define CLK_SYS_USB 7 +#define CLK_SYS_SDIO 8 +#define CLK_SYS_HDMI 9 +#define CLK_SYS_GFX_CORE 10 +#define CLK_SYS_GFX_DMA 11 +#define CLK_SYS_GFX_CFG 12 +#define CLK_SYS_DMAC_CORE 13 +#define CLK_SYS_DMAC_CFG 14 +#define CLK_SYS_SDIO_REF 15 +#define CLK_SYS_SPI_REF 16 +#define CLK_SYS_I2C_REF 17 +#define CLK_SYS_UART_REF 18 +#define CLK_SYS_EBI_REF 19 +#define CLK_TUN_PLL 20 +#define CLK_TUN 21 +#define CLK_HDMI_PLL 22 +#define CLK_HDMI 23 + +#endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */ |