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authorAdam Ford <aford173@gmail.com>2020-06-30 09:30:07 -0500
committerMarek Vasut <marek.vasut+renesas@gmail.com>2020-07-25 11:16:39 +0200
commit3aabb0c3f17309c802be28d8417b19d04b85976c (patch)
treed126f594013b8df8d104be90d0659b864aa3b10a /include/dt-bindings/power/r8a774a1-sysc.h
parentdbabfcc8734c071a4efcaf8eac7cb641fa0ed9b9 (diff)
ARM: dts: r8a774a1: Import DTS from Linux 5.8-rc1
This patch imports the device tree and required bindings to permit the device tree to build for the R8Z774A1 (RZ/G2M). Signed-off-by: Adam Ford <aford173@gmail.com>
Diffstat (limited to 'include/dt-bindings/power/r8a774a1-sysc.h')
-rw-r--r--include/dt-bindings/power/r8a774a1-sysc.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a774a1-sysc.h b/include/dt-bindings/power/r8a774a1-sysc.h
new file mode 100644
index 0000000000..d84ea0eb12
--- /dev/null
+++ b/include/dt-bindings/power/r8a774a1-sysc.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A774A1_PD_CA57_CPU0 0
+#define R8A774A1_PD_CA57_CPU1 1
+#define R8A774A1_PD_CA53_CPU0 5
+#define R8A774A1_PD_CA53_CPU1 6
+#define R8A774A1_PD_CA53_CPU2 7
+#define R8A774A1_PD_CA53_CPU3 8
+#define R8A774A1_PD_CA57_SCU 12
+#define R8A774A1_PD_CR7 13
+#define R8A774A1_PD_A3VC 14
+#define R8A774A1_PD_3DG_A 17
+#define R8A774A1_PD_3DG_B 18
+#define R8A774A1_PD_CA53_SCU 21
+#define R8A774A1_PD_A3IR 24
+#define R8A774A1_PD_A2VC0 25
+#define R8A774A1_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A774A1_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A774A1_SYSC_H__ */