mpc83xx: Add strider board

The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
[trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now]
Signed-off-by: Tom Rini <trini@konsulko.com>

1 files changed, 63 insertions, 0 deletions

diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h
index f8d8322d59..69d248f170 100644
--- a/include/gdsys_fpga.h
+++ b/include/gdsys_fpga.h
@@ -197,6 +197,69 @@ struct ihs_fpga {
 };
 #endif
 
+#ifdef CONFIG_STRIDER_CPU
+struct ihs_fpga {
+	u16 reflection_low;	/* 0x0000 */
+	u16 versions;		/* 0x0002 */
+	u16 fpga_version;	/* 0x0004 */
+	u16 fpga_features;	/* 0x0006 */
+	u16 reserved_0[1];	/* 0x0008 */
+	u16 top_interrupt;	/* 0x000a */
+	u16 reserved_1[3];	/* 0x000c */
+	u16 extended_control;	/* 0x0012 */
+	struct ihs_gpio gpio;	/* 0x0014 */
+	u16 mpc3w_control;	/* 0x001a */
+	u16 reserved_2[2];	/* 0x001c */
+	struct ihs_io_ep ep;	/* 0x0020 */
+	u16 reserved_3[9];	/* 0x002e */
+	u16 mc_int;		/* 0x0040 */
+	u16 mc_int_en;		/* 0x0042 */
+	u16 mc_status;		/* 0x0044 */
+	u16 mc_control;		/* 0x0046 */
+	u16 mc_tx_data;		/* 0x0048 */
+	u16 mc_tx_address;	/* 0x004a */
+	u16 mc_tx_cmd;		/* 0x004c */
+	u16 mc_res;		/* 0x004e */
+	u16 mc_rx_cmd_status;	/* 0x0050 */
+	u16 mc_rx_data;		/* 0x0052 */
+	u16 reserved_4[62];	/* 0x0054 */
+	struct ihs_i2c i2c0;	/* 0x00d0 */
+};
+#endif
+
+#ifdef CONFIG_STRIDER_CON
+struct ihs_fpga {
+	u16 reflection_low;	/* 0x0000 */
+	u16 versions;		/* 0x0002 */
+	u16 fpga_version;	/* 0x0004 */
+	u16 fpga_features;	/* 0x0006 */
+	u16 reserved_0[1];	/* 0x0008 */
+	u16 top_interrupt;	/* 0x000a */
+	u16 reserved_1[4];	/* 0x000c */
+	struct ihs_gpio gpio;	/* 0x0014 */
+	u16 mpc3w_control;	/* 0x001a */
+	u16 reserved_2[2];	/* 0x001c */
+	struct ihs_io_ep ep;	/* 0x0020 */
+	u16 reserved_3[9];	/* 0x002e */
+	struct ihs_i2c i2c0;	/* 0x0040 */
+	u16 reserved_4[10];	/* 0x004c */
+	u16 mc_int;		/* 0x0060 */
+	u16 mc_int_en;		/* 0x0062 */
+	u16 mc_status;		/* 0x0064 */
+	u16 mc_control;		/* 0x0066 */
+	u16 mc_tx_data;		/* 0x0068 */
+	u16 mc_tx_address;	/* 0x006a */
+	u16 mc_tx_cmd;		/* 0x006c */
+	u16 mc_res;		/* 0x006e */
+	u16 mc_rx_cmd_status;	/* 0x0070 */
+	u16 mc_rx_data;		/* 0x0072 */
+	u16 reserved_5[70];	/* 0x0074 */
+	struct ihs_osd osd;	/* 0x0100 */
+	u16 reserved_6[889];	/* 0x010e */
+	u16 videomem[31736];	/* 0x0800 */
+};
+#endif
+
 #ifdef CONFIG_DLVISION_10G
 struct ihs_fpga {
 	u16 reflection_low;	/* 0x0000 */