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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2020-05-25 13:39:55 +0200 |
|---|---|---|
| committer | Matthias Brugger <mbrugger@suse.com> | 2020-07-09 15:46:12 +0200 |
| commit | d69ddf24944162745665a45fef00a2115d371dbe (patch) | |
| tree | 25991230dff7c0a288defaebe4e2244dc25b25c8 /include/linux/bitfield.h | |
| parent | c44b3f523c48b544f9268410a9e0c26ea6fb7c5c (diff) | |
rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Diffstat (limited to 'include/linux/bitfield.h')
0 files changed, 0 insertions, 0 deletions