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| author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2015-01-23 09:31:57 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2015-02-13 13:14:56 +0900 |
| commit | 3eda55a32d3787303934a1575684a8f61c362892 (patch) | |
| tree | cbeb5b3c02b825d4524cae8e90713ab13759f879 /include/mpc8xx_irq.h | |
| parent | a973be74c206d6cc04ccee9de6831c1e98d9527b (diff) | |
arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register
r8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we
need to enable SMP bit of Auxiliary Control Register.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/mpc8xx_irq.h')
0 files changed, 0 insertions, 0 deletions