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authorStefan Roese <sr@denx.de>2007-08-13 09:05:33 +0200
committerStefan Roese <sr@denx.de>2007-08-13 09:05:33 +0200
commit273db7e1bdd1937e32f1d4507321bb721ebd3118 (patch)
tree71b1c8710bdfd10dbffca0cf3f0aa0255e064c17 /include/ppc405.h
parent35d22f957a85a22bb3cd1ad084fa5404620d1c42 (diff)
ppc4xx: Fix problem in PLL clock calculation
This patch was originall provided by David Mitchell <dmitchell@amcc.com> and fixes a bug in the PLL clock calculation. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc405.h')
-rw-r--r--include/ppc405.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/ppc405.h b/include/ppc405.h
index 8e64731929..e4522e7cc9 100644
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -617,6 +617,8 @@
#define CPR_CLKUPD_ENDVCH_EN 0x20000000 /* Enable CPR Sys. Div. Changes */
#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */
+#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */
+
#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */
#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */
#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */