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author | Bin Meng <bmeng.cn@gmail.com> | 2018-12-12 06:12:36 -0800 |
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committer | Andes <uboot@andestech.com> | 2018-12-18 09:56:27 +0800 |
commit | ea53f1c74272bd7b1d9c8a28df4ac145c72131dd (patch) | |
tree | ca62776a9b1f04df964623b80df6dd1dd8594546 /include/qfw.h | |
parent | 3c276b27032f53bef478f9a2c05fd6923ad560bf (diff) |
riscv: Add CSR numbers
The standard RISC-V ISA sets aside a 12-bit encoding space for up
to 4096 CSRs. This adds all known CSR numbers as defined in the
RISC-V Privileged Architecture Version 1.10.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include/qfw.h')
0 files changed, 0 insertions, 0 deletions