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authorFabio Estevam <festevam@gmail.com>2012-03-21 05:42:45 +0000
committerStefano Babic <sbabic@denx.de>2012-03-27 09:41:17 +0200
commit67ee3dd35e20953e9e271d01a4ba4c4b417ec961 (patch)
tree95d3a04d591215ed8bcb92e5e765d4ff411c9cce /include/sed13806.h
parent94f0003f654fb490ee4be2e2aef1811835f1fb8d (diff)
mx53: Make PLL2 to be the parent of UART clock
Change the parent UART clock to be PLL2, so that U-boot can also boot a Freescale 2.6.35 kernel for mx53. FSL kernel and U-boot changed the UART parent from PLL3 to PLL2 to avoid conflicts with IPU clocks, so that the video resolution can be changed without affecting the UART clock. On a 2.6.35 kernel the serial console is messed up after IPU driver is loaded and this patch fixes this problem. Tested on a mx53loco board booting a FSL kernel and also a mainline kernel. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'include/sed13806.h')
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