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authorBin Meng <bmeng.cn@gmail.com>2018-08-03 01:14:33 -0700
committerSimon Glass <sjg@chromium.org>2018-08-08 12:49:31 +0100
commit01259c93904fcffc4d127219145ecb0d44fa5ae1 (patch)
treeee62b4f2ce8b746e7f56842e6394dc16d774b5f2 /include
parentb1aad8dbe28415695b290726199681ced969c118 (diff)
pci: Remove 440ep-specific macros
These macros should not be put in the generic pci.h header file. Since they are not referenced anywhere, remove them completely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/pci.h15
1 files changed, 0 insertions, 15 deletions
diff --git a/include/pci.h b/include/pci.h
index 8e27cbfaf1..427094cd70 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -271,21 +271,6 @@
#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */
-/* From 440ep */
-#define PCI_ERREN 0x48 /* Error Enable */
-#define PCI_ERRSTS 0x49 /* Error Status */
-#define PCI_BRDGOPT1 0x4A /* PCI Bridge Options 1 */
-#define PCI_PLBSESR0 0x4C /* PCI PLB Slave Error Syndrome 0 */
-#define PCI_PLBSESR1 0x50 /* PCI PLB Slave Error Syndrome 1 */
-#define PCI_PLBSEAR 0x54 /* PCI PLB Slave Error Address */
-#define PCI_CAPID 0x58 /* Capability Identifier */
-#define PCI_NEXTITEMPTR 0x59 /* Next Item Pointer */
-#define PCI_PMC 0x5A /* Power Management Capabilities */
-#define PCI_PMCSR 0x5C /* Power Management Control Status */
-#define PCI_PMCSRBSE 0x5E /* PMCSR PCI to PCI Bridge Support Extensions */
-#define PCI_BRDGOPT2 0x60 /* PCI Bridge Options 2 */
-#define PCI_PMSCRR 0x64 /* Power Management State Change Request Re. */
-
/* Header type 2 (CardBus bridges) */
#define PCI_CB_CAPABILITY_LIST 0x14
/* 0x15 reserved */