diff options
| author | Stephen Warren <swarren@nvidia.com> | 2017-12-19 18:30:35 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2018-01-12 09:52:10 -0700 |
| commit | 0d1bd150f041b9c5939e2e6be36f91444b10cace (patch) | |
| tree | 5c2a5ffd3a038904fa93165bd48251a5b6ebe9b7 /include | |
| parent | 3cdb5fa08a226a64e3486f7c2a32d044bdfada7d (diff) | |
ARM: tegra: remove SPL config for non-SPL SoCs
No 64-bit Tegra uses SPL. Remove various unused definitions from config
headers.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/tegra-common.h | 2 | ||||
| -rw-r--r-- | include/configs/tegra186-common.h | 5 | ||||
| -rw-r--r-- | include/configs/tegra210-common.h | 5 |
3 files changed, 2 insertions, 10 deletions
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 3cdd9741b2..75e36c0b75 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -84,11 +84,13 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +#ifndef CONFIG_ARM64 /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#endif /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h index 98e4fc2d25..495d18555f 100644 --- a/include/configs/tegra186-common.h +++ b/include/configs/tegra186-common.h @@ -60,9 +60,4 @@ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" -/* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc - #endif diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 4c05576a90..93c9455e8f 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -60,11 +60,6 @@ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" -/* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc - /* For USB EHCI controller */ #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 |