Merge git://git.denx.de/u-boot-socfpga

7 files changed, 100 insertions, 11 deletions

diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
index 8364c66a8d..ebb6ed50f9 100644
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -6,7 +6,7 @@
 #ifndef __CONFIG_SOCFPGA_ARRIA5_H__
 #define __CONFIG_SOCFPGA_ARRIA5_H__
 
-#include <asm/arch/socfpga_base_addrs.h>
+#include <asm/arch/base_addr_ac5.h>
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
@@ -79,7 +79,6 @@
 	"bootimage=zImage\0" \
 	"fdt_addr=100\0" \
 	"fdtimage=socfpga.dtb\0" \
-		"fsloadcmd=ext2load\0" \
 	"bootm ${loadaddr} - ${fdt_addr}\0" \
 	"mmcroot=/dev/mmcblk0p2\0" \
 	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index b22e3b1ae9..b3f65b60d9 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -152,8 +152,6 @@
 #define CONFIG_DWMMC
 #define CONFIG_SOCFPGA_DWMMC
 #define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH	1024
-#define CONFIG_SOCFPGA_DWMMC_DRVSEL	3
-#define CONFIG_SOCFPGA_DWMMC_SMPSEL	0
 /* FIXME */
 /* using smaller max blk cnt to avoid flooding the limited stack we have */
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT	256	/* FIXME -- SPL only? */
diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
index 86b53e200d..67bb35fa07 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -6,7 +6,7 @@
 #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
 #define __CONFIG_SOCFPGA_CYCLONE5_H__
 
-#include <asm/arch/socfpga_base_addrs.h>
+#include <asm/arch/base_addr_ac5.h>
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
@@ -79,7 +79,6 @@
 	"bootimage=zImage\0" \
 	"fdt_addr=100\0" \
 	"fdtimage=socfpga.dtb\0" \
-		"fsloadcmd=ext2load\0" \
 	"bootm ${loadaddr} - ${fdt_addr}\0" \
 	"mmcroot=/dev/mmcblk0p2\0" \
 	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index 3ae9b3ef42..16e146ce55 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -6,7 +6,7 @@
 #ifndef __CONFIG_TERASIC_DE0_H__
 #define __CONFIG_TERASIC_DE0_H__
 
-#include <asm/arch/socfpga_base_addrs.h>
+#include <asm/arch/base_addr_ac5.h>
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
@@ -74,7 +74,6 @@
 	"bootimage=zImage\0" \
 	"fdt_addr=100\0" \
 	"fdtimage=socfpga.dtb\0" \
-		"fsloadcmd=ext2load\0" \
 	"bootm ${loadaddr} - ${fdt_addr}\0" \
 	"mmcroot=/dev/mmcblk0p2\0" \
 	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index 4b270cecae..d051eeca66 100644
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -6,7 +6,7 @@
 #ifndef __CONFIG_DENX_MCVEVK_H__
 #define __CONFIG_DENX_MCVEVK_H__
 
-#include <asm/arch/socfpga_base_addrs.h>
+#include <asm/arch/base_addr_ac5.h>
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index 742c5ae61f..5bcee05c72 100644
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -6,7 +6,7 @@
 #ifndef __CONFIG_TERASIC_SOCKIT_H__
 #define __CONFIG_TERASIC_SOCKIT_H__
 
-#include <asm/arch/socfpga_base_addrs.h>
+#include <asm/arch/base_addr_ac5.h>
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
@@ -79,7 +79,6 @@
 	"bootimage=zImage\0" \
 	"fdt_addr=100\0" \
 	"fdtimage=socfpga.dtb\0" \
-		"fsloadcmd=ext2load\0" \
 	"bootm ${loadaddr} - ${fdt_addr}\0" \
 	"mmcroot=/dev/mmcblk0p2\0" \
 	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
new file mode 100644
index 0000000000..16a2a8640c
--- /dev/null
+++ b/include/configs/socfpga_socrates.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_SOCFPGA_SOCRATES_H__
+#define __CONFIG_SOCFPGA_SOCRATES_H__
+
+#include <asm/arch/base_addr_ac5.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCrates */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"zImage"
+#define CONFIG_BOOTARGS		"console=ttyS0," __stringify(CONFIG_BAUDRATE)
+#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
+#define CONFIG_LOADADDR		0x01000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* Ethernet on SoC (EMAC) */
+#if defined(CONFIG_CMD_NET)
+
+/* PHY */
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9021
+#define CONFIG_KSZ9021_CLK_SKEW_ENV	"micrel-ksz9021-clk-skew"
+#define CONFIG_KSZ9021_CLK_SKEW_VAL	0xf0f0
+#define CONFIG_KSZ9021_DATA_SKEW_ENV	"micrel-ksz9021-data-skew"
+#define CONFIG_KSZ9021_DATA_SKEW_VAL	0x0
+
+#endif
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		0	/* device 0 */
+#define CONFIG_ENV_OFFSET		512	/* just after the MBR */
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "EBV"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_socrates
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \
+	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"bootimage=zImage\0" \
+	"fdt_addr=100\0" \
+	"fdtimage=socfpga.dtb\0" \
+	"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"mmcroot=/dev/mmcblk0p2\0" \
+	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
+		" root=${mmcroot} rw rootwait;" \
+		"bootz ${loadaddr} - ${fdt_addr}\0" \
+	"mmcload=mmc rescan;" \
+		"load mmc 0:1 ${loadaddr} ${bootimage};" \
+		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+	"qspiroot=/dev/mtdblock0\0" \
+	"qspirootfstype=jffs2\0" \
+	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
+		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
+		"bootm ${loadaddr} - ${fdt_addr}\0"
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
+
+#endif	/* __CONFIG_SOCFPGA_SOCRATES_H__ */