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authorTom Rini <trini@ti.com>2013-06-13 15:16:15 -0400
committerTom Rini <trini@ti.com>2013-06-13 15:16:15 -0400
commit41341221d12341a2ecfb280142d6478071738fc2 (patch)
tree850a87b274b572b65a579474a0aad5e590ca6d61 /include
parentb7ab8b8ff092ab8214eeb86e8a79573154f448b9 (diff)
parent847e6693ccb529bf8346db62876f38f0c4e04ade (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR Conflicts: arch/arm/include/asm/arch-omap5/omap.h Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/cgtqmx6eval.h194
-rw-r--r--include/configs/da830evm.h25
-rw-r--r--include/configs/dra7xx_evm.h8
-rw-r--r--include/configs/lp8x4x.h262
-rw-r--r--include/configs/mx23evk.h17
-rw-r--r--include/configs/mx28evk.h17
-rw-r--r--include/configs/mx53ard.h3
-rw-r--r--include/configs/mx6qsabre_common.h2
-rw-r--r--include/configs/mx6qsabreauto.h7
-rw-r--r--include/configs/mx6qsabresd.h1
-rw-r--r--include/configs/mx6slevk.h2
-rw-r--r--include/configs/omap2420h4.h264
-rw-r--r--include/configs/omap4_common.h4
-rw-r--r--include/configs/omap5_common.h12
-rw-r--r--include/configs/omap5_uevm.h7
-rw-r--r--include/configs/vf610twr.h140
-rw-r--r--include/configs/wandboard.h20
-rw-r--r--include/palmas.h90
18 files changed, 776 insertions, 299 deletions
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
new file mode 100644
index 0000000000..13638587f1
--- /dev/null
+++ b/include/configs/cgtqmx6eval.h
@@ -0,0 +1,194 @@
+/*
+ *
+ * Congatec Conga-QEVAl board configuration file.
+ *
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Based on Freescale i.MX6Q Sabre Lite board configuration file.
+ * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
+ * Leo Sartre, <lsartre@adeneo-embedded.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_CGTQMX6EVAL_H
+#define __CONFIG_CGTQMX6EVAL_H
+
+#define CONFIG_MX6
+
+#include "mx6_common.h"
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_MACH_TYPE 4122
+
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART2_BASE
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* Miscellaneous commands */
+#define CONFIG_CMD_BMODE
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+/* Command definition */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_LOADADDR 0x12000000
+#define CONFIG_SYS_TEXT_BASE 0x17800000
+
+#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "uimage=uImage\0" \
+ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "boot_dir=/boot\0" \
+ "console=ttymxc1\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "fdt_addr=0x11000000\0" \
+ "boot_fdt=try\0" \
+ "mmcdev=1\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loaduimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
+ "${boot_dir}/${uimage}\0" \
+ "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
+ "${boot_dir}/${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev};" \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "else "\
+ "echo ERR: Fail to boot from mmc; " \
+ "fi; " \
+ "fi; " \
+ "else echo ERR: Fail to boot from mmc; fi"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 256
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START 0x10000000
+#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_CMDLINE_EDITING
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+#define CONFIG_ENV_IS_IN_MMC
+
+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#endif /* __CONFIG_CGTQMX6EVAL_H */
diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h
index 198892ba57..00e92a6850 100644
--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@@ -36,6 +36,7 @@
#define CONFIG_MACH_DAVINCI_DA830_EVM
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
+#define CONFIG_SOC_DA830 /* TI DA830 SoC */
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
@@ -226,6 +227,28 @@
#define CONFIG_CMD_SAVEENV
#endif
+/* SD/MMC configuration */
+#ifndef CONFIG_USE_NAND
+#define CONFIG_MMC
+#define CONFIG_DAVINCI_MMC_SD1
+#define CONFIG_GENERIC_MMC
+#define CONFIG_DAVINCI_MMC
+#endif
+
+/*
+ * Enable MMC commands only when
+ * MMC support is present
+ */
+#if defined(CONFIG_MMC) || defined(CONFIG_USB_DA8XX)
+#define CONFIG_DOS_PARTITION /* include support for FAT/storage */
+#define CONFIG_CMD_FAT /* include support for FAT cmd */
+#endif
+
+#ifdef CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#endif
+
#if !defined(CONFIG_USE_NAND) && \
!defined(CONFIG_USE_NOR) && \
!defined(CONFIG_USE_SPIFLASH)
@@ -244,8 +267,6 @@
#define CONFIG_USB_STORAGE /* MSC class support */
#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */
-#define CONFIG_CMD_FAT /* inclue support for FAT/storage */
-#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */
#ifdef CONFIG_USB_KEYBOARD /* HID class support */
#define CONFIG_SYS_USB_EVENT_POLL
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 28a306ba8e..0eea28c80a 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -28,11 +28,17 @@
#ifndef __CONFIG_DRA7XX_EVM_H
#define __CONFIG_DRA7XX_EVM_H
+/* High Level Configuration Options */
+#define CONFIG_DRA7XX /* in a TI DRA7XX core */
#define CONFIG_ENV_IS_NOWHERE /* For now. */
#include <configs/omap5_common.h>
-#define CONFIG_DRA7XX /* in a TI DRA7XX core */
#define CONFIG_SYS_PROMPT "DRA752 EVM # "
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550_COM1 UART1_BASE
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_SYS_OMAP_ABE_SYSCK
#endif /* __CONFIG_DRA7XX_EVM_H */
diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h
new file mode 100644
index 0000000000..026f32134a
--- /dev/null
+++ b/include/configs/lp8x4x.h
@@ -0,0 +1,262 @@
+/*
+ * ICP DAS LP-8x4x configuration file
+ *
+ * Copyright (C) 2013 Sergey Yanovich <ynvich@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Board Configuration Options
+ */
+#define CONFIG_CPU_PXA27X /* Marvell PXA270 CPU */
+#define MACH_TYPE_LP8X4X 4539 /* ICP DAS LP-8x4x */
+#define CONFIG_MACH_TYPE MACH_TYPE_LP8X4X
+#define CONFIG_SYS_TEXT_BASE 0x00000000
+
+#define CONFIG_SYS_MALLOC_LEN (128*1024)
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOOTCOMMAND \
+ "bootm 80000;"
+
+#define CONFIG_BOOTARGS \
+ "console=ttySA0,115200 mem=128M root=/dev/mmcblk0p1 rw" \
+ "init=/sbin/init rootfstype=ext3"
+
+#define CONFIG_TIMESTAMP
+#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_LZMA /* LZMA compression support */
+#undef CONFIG_OF_LIBFDT
+
+/*
+ * Serial Console Configuration
+ */
+#define CONFIG_PXA_SERIAL
+#define CONFIG_FFUART 1
+#define CONFIG_CONS_INDEX 3
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * Bootloader Components Configuration
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ENV
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_USB
+#undef CONFIG_LCD
+#undef CONFIG_CMD_IDE
+
+/*
+ * Networking Configuration
+ * chip on the ICPDAS LINPAC board
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DM9000_BASE 0x0C000000
+#define DM9000_IO 0x0C000000
+#define DM9000_DATA 0x0C004000
+#define DM9000_IO_2 0x0D000000
+#define DM9000_DATA_2 0x0D004000
+#define CONFIG_NET_RETRY_COUNT 10
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#endif
+
+/*
+ * MMC Card Configuration
+ */
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_PXA_MMC_GENERIC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_DOS_PARTITION
+#endif
+
+/*
+ * KGDB
+ */
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * HUSH Shell Configuration
+ */
+#define CONFIG_SYS_HUSH_PARSER 1
+
+#undef CONFIG_SYS_LONGHELP
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "$ "
+#else
+#define CONFIG_SYS_PROMPT "=> "
+#endif
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_DEVICE_NULLDEV 1
+#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_AUTO_COMPLETE 1
+
+/*
+ * Clock Configuration
+ */
+#define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */
+
+/*
+ * DRAM Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
+
+#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
+#define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
+
+#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+
+#define CONFIG_SYS_LOAD_ADDR 0xa0008000
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+/* Use first 64kb bank of the internal SRAM */
+#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
+
+/*
+ * NOR FLASH
+ */
+#define CONFIG_SYS_MONITOR_BASE 0x0
+#define CONFIG_SYS_MONITOR_LEN 0x40000
+#define CONFIG_ENV_ADDR \
+ (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE 0x40000
+#define CONFIG_ENV_SECT_SIZE 0x40000
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER 1
+
+#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
+#define CONFIG_SYS_MAX_FLASH_BANKS 2
+#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
+#define CONFIG_SYS_FLASH_PROTECTION 1
+
+#define CONFIG_ENV_IS_IN_FLASH 1
+
+/*
+ * GPIO settings
+ */
+#define CONFIG_SYS_GPSR0_VAL 0x0808c014
+#define CONFIG_SYS_GPSR1_VAL 0x00cf0002
+#define CONFIG_SYS_GPSR2_VAL 0x0221c000
+#define CONFIG_SYS_GPSR3_VAL 0x00020000
+
+#define CONFIG_SYS_GPCR0_VAL 0x00000000
+#define CONFIG_SYS_GPCR1_VAL 0x0000ab80
+#define CONFIG_SYS_GPCR2_VAL 0x00100000
+#define CONFIG_SYS_GPCR3_VAL 0x0
+
+#define CONFIG_SYS_GPDR0_VAL 0xc0e9ddf4
+#define CONFIG_SYS_GPDR1_VAL 0xfcffab83
+#define CONFIG_SYS_GPDR2_VAL 0x02f1ffff
+#define CONFIG_SYS_GPDR3_VAL 0x00021b81
+
+#define CONFIG_SYS_GAFR0_L_VAL 0x80000000
+#define CONFIG_SYS_GAFR0_U_VAL 0xa5e54018
+#define CONFIG_SYS_GAFR1_L_VAL 0x999a955a
+#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a00a
+#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
+#define CONFIG_SYS_GAFR2_U_VAL 0x55f0a402
+#define CONFIG_SYS_GAFR3_L_VAL 0x540a950c
+#define CONFIG_SYS_GAFR3_U_VAL 0x00001599
+
+#define CONFIG_SYS_PSSR_VAL 0x32
+
+/*
+ * Clock settings
+ */
+#define CONFIG_SYS_CKEN 0x005002c0
+#define CONFIG_SYS_CCCR 0x02000290
+#define CONFIG_SYS_CLKCFG 0x0000000b
+
+/*
+ * Memory settings
+ */
+#define CONFIG_SYS_MSC0_VAL 0x2bd8aad2
+#define CONFIG_SYS_MSC1_VAL 0xb8c9b8dc
+#define CONFIG_SYS_MSC2_VAL 0xfff9b8c9
+#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
+#define CONFIG_SYS_MDREFR_VAL 0x2093e018
+#define CONFIG_SYS_MDCNFG_VAL 0x890009d1
+#define CONFIG_SYS_MDMRS_VAL 0x00220022
+#define CONFIG_SYS_SXCNFG_VAL 0x40044004
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define CONFIG_SYS_MECR_VAL 0x00000001
+#define CONFIG_SYS_MCMEM0_VAL 0x0000c497
+#define CONFIG_SYS_MCMEM1_VAL 0x0000c497
+#define CONFIG_SYS_MCATT0_VAL 0x0000c497
+#define CONFIG_SYS_MCATT1_VAL 0x0000c497
+#define CONFIG_SYS_MCIO0_VAL 0x00008407
+#define CONFIG_SYS_MCIO1_VAL 0x00008407
+
+/*
+ * LCD
+ */
+#ifdef CONFIG_LCD
+#define CONFIG_VOIPAC_LCD
+#endif
+
+/*
+ * USB
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "lp8x4x"
+#define CONFIG_USB_STORAGE
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index e5a15a451c..3a58afee9a 100644
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -60,6 +60,7 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_USB
#define CONFIG_CMD_BOOTZ
+#define CONFIG_VIDEO
/* Memory configurations */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
@@ -133,6 +134,22 @@
#define CONFIG_USB_STORAGE
#endif
+/* Framebuffer support */
+#ifdef CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_MXS
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
+#endif
+
/* Boot Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 54d01f9ed8..de69182b4f 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -64,6 +64,7 @@
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
+#define CONFIG_VIDEO
/* Memory configurations */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
@@ -235,6 +236,22 @@
#endif
#endif
+/* Framebuffer support */
+#ifdef CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_MXS
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
+#endif
+
/* Boot Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 41974b1262..b0a965fbba 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -118,7 +118,7 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=" __stringify(CONFIG_SYS_MMC_ENV_PART) "\0" \
+ "mmcpart=2\0" \
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
"update_sd_firmware_filename=u-boot.imx\0" \
"update_sd_firmware=" \
@@ -240,7 +240,6 @@
#define CONFIG_ENV_SIZE (8 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_OF_LIBFDT
diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h
index 7298a7692e..bfaa420ed0 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -97,7 +97,7 @@
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=" __stringify(CONFIG_SYS_MMC_ENV_PART) "\0" \
+ "mmcpart=1\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"update_sd_firmware=" \
"if test ${ip_dyn} = yes; then " \
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 1583c11aab..76f7812069 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -35,7 +35,12 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
#endif
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_SPEED 100000
+
#endif /* __MX6QSABREAUTO_CONFIG_H */
diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6qsabresd.h
index 3b8d752eed..44f07cbe45 100644
--- a/include/configs/mx6qsabresd.h
+++ b/include/configs/mx6qsabresd.h
@@ -29,7 +29,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 3
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
-#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
#endif
#endif /* __MX6QSABRESD_CONFIG_H */
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 8a94efdd6d..19dcdd605c 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -59,7 +59,7 @@
#define CONFIG_BOOTDELAY 3
-#define CONFIG_LOADADDR 0x80800000
+#define CONFIG_LOADADDR 0x82000000
#define CONFIG_SYS_TEXT_BASE 0x87800000
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
deleted file mode 100644
index 04e8d3ad51..0000000000
--- a/include/configs/omap2420h4.h
+++ /dev/null
@@ -1,264 +0,0 @@
-/*
- * (C) Copyright 2004
- * Texas Instruments.
- * Richard Woodruff <r-woodruff2@ti.com>
- * Kshitij Gupta <kshitij@ti.com>
- *
- * Configuration settings for the 242x TI H4 board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP2420 1 /* which is in a 2420 */
-#define CONFIG_OMAP2420H4 1 /* and on a H4 board */
-/*#define CONFIG_APTIX 1 #* define if on APTIX test chip */
-/*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */
-
-#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000
-
-/* Clock config to target*/
-#define PRCM_CONFIG_II 1
-/* #define PRCM_CONFIG_III 1 */
-
-#include <asm/arch/omap2420.h> /* get chip and board defs */
-
-/* On H4, NOR and NAND flash are mutual exclusive.
- Define this if you want to use NAND
- */
-/*#define CONFIG_SYS_NAND_BOOT */
-
-#ifdef CONFIG_APTIX
-#define V_SCLK 1500000
-#else
-#define V_SCLK 12000000
-#endif
-
-/* input clock of PLL */
-/* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
-#define CONFIG_SYS_CLK_FREQ V_SCLK
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_REVISION_TAG 1
-#define CONFIG_OF_LIBFDT
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
-
-/*
- * Hardware drivers
- */
-
-/*
- * SMC91c96 Etherent
- */
-#define CONFIG_LAN91C96
-#define CONFIG_LAN91C96_BASE (H4_CS1_BASE+0x300)
-#define CONFIG_LAN91C96_EXT_PHY
-
-/*
- * NS16550 Configuration
- */
-#ifdef CONFIG_APTIX
-#define V_NS16550_CLK (6000000) /* 6MHz in current MaxSet */
-#else
-#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
-#endif
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
-#define CONFIG_SYS_NS16550_COM1 OMAP2420_UART1
-
-/*
- * select serial console configuration
- */
-#define CONFIG_SERIAL1 1 /* UART1 on H4 */
-
- /*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_DRIVER_OMAP24XX_I2C
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#ifdef CONFIG_SYS_NAND_BOOT
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_I2C
- #define CONFIG_CMD_NAND
- #define CONFIG_CMD_JFFS2
-#else
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_I2C
- #define CONFIG_CMD_JFFS2
-
- #undef CONFIG_CMD_SOURCE
-#endif
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-
-#define CONFIG_BOOTDELAY 3
-
-#ifdef NFS_BOOT_DEFAULTS
-#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
-#else
-#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=32M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
-#endif
-
-#define CONFIG_NETMASK 255.255.254.0
-#define CONFIG_IPADDR 128.247.77.90
-#define CONFIG_SERVERIP 128.247.77.158
-#define CONFIG_BOOTFILE "uImage"
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#ifdef CONFIG_APTIX
-# define CONFIG_SYS_PROMPT "OMAP2420 Aptix # "
-#else
-# define CONFIG_SYS_PROMPT "OMAP242x H4 # "
-#endif
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
-
-#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */
-
-/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
- */
-#ifdef CONFIG_APTIX
-#define V_PTV 3
-#else
-#define V_PTV 7 /* use with 12MHz/128 */
-#endif
-
-#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
-#define CONFIG_SYS_PTV V_PTV /* 2^(PTV+1) */
-#define CONFIG_SYS_HZ 1000
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1 OMAP2420_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
-#define PHYS_SDRAM_2 OMAP2420_SDRC_CS1
-
-#define PHYS_FLASH_SECT_SIZE SZ_128K
-#define PHYS_FLASH_1 H4_CS0_BASE /* Flash Bank #1 */
-#define PHYS_FLASH_SIZE_1 SZ_32M
-#define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */
-#define PHYS_FLASH_SIZE_2 SZ_32M
-
-#define PHYS_SRAM 0x4020F800
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
-#define CONFIG_SYS_MONITOR_LEN SZ_128K /* Reserve 1 sector */
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE_1 }
-
-#ifdef CONFIG_SYS_NAND_BOOT
-#define CONFIG_ENV_IS_IN_NAND 1
-#define CONFIG_ENV_OFFSET 0x80000 /* environment starts here */
-#else
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + SZ_256K)
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
-#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
-#endif
-
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
-#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
-#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-
-/*
- * JFFS2 partitions
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor1"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nor1=omap2420-1"
-#define MTDPARTS_DEFAULT "mtdparts=omap2420-1:-(jffs2)"
-*/
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index d6448b0529..3e5d36b21e 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -45,10 +45,6 @@
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_DISPLAY_BOARDINFO 1
-/* Clock Defines */
-#define V_OSCK 38400000 /* Clock output from T2 */
-#define V_SCLK V_OSCK
-
#define CONFIG_MISC_INIT_R
#define CONFIG_OF_LIBFDT 1
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index deb5e9fd5e..ddf2ad4fc2 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -45,10 +45,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-/* Clock Defines */
-#define V_OSCK 19200000 /* Clock output from T2 */
-#define V_SCLK V_OSCK
-
#define CONFIG_MISC_INIT_R
#define CONFIG_OF_LIBFDT
@@ -81,10 +77,6 @@
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 UART3_BASE
-
-#define CONFIG_BAUDRATE 115200
/* CPU */
#define CONFIG_ARCH_CPU_INIT
@@ -246,6 +238,10 @@
#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
#endif
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_PALMAS_POWER
+#endif
+
/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 9e0339b31b..dea05bc911 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -35,10 +35,9 @@
#include <configs/omap5_common.h>
-/* TWL6035 */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_PALMAS_POWER
-#endif
+#define CONFIG_CONS_INDEX 3
+#define CONFIG_SYS_NS16550_COM3 UART3_BASE
+#define CONFIG_BAUDRATE 115200
/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
new file mode 100644
index 0000000000..77fe893b75
--- /dev/null
+++ b/include/configs/vf610twr.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Freescale Vybrid vf610twr board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+#include <config_cmd_default.h>
+
+#define CONFIG_VF610
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_MACH_TYPE 4146
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* Enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
+
+#define CONFIG_CMD_FUSE
+#ifdef CONFIG_CMD_FUSE
+#define CONFIG_MXC_OCOTP
+#endif
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_FSL_LPUART
+#define LPUART_BASE UART1_BASE
+
+/* Allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_UART_PORT (1)
+#define CONFIG_BAUDRATE 115200
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_ESDHC_NUM 1
+
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_FEC_MXC_PHYADDR 0
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_SYS_TEXT_BASE 0x3f008000
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_PROMPT "Vybrid U-Boot > "
+#undef CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START 0x80010000
+#define CONFIG_SYS_MEMTEST_END 0x87C00000
+
+#define CONFIG_SYS_LOAD_ADDR 0x80010000
+
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+
+/* Physical memory map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM (0x80000000)
+#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+
+#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#endif
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 9d7ec3f6ff..5593f1c533 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -29,7 +29,7 @@
#define CONFIG_REVISION_TAG
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
+#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
@@ -86,6 +86,21 @@
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IPUV3_CLK 260000000
+
#if defined(CONFIG_MX6DL)
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb"
#elif defined(CONFIG_MX6S)
@@ -103,7 +118,7 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=" __stringify(CONFIG_SYS_MMC_ENV_PART) "\0" \
+ "mmcpart=2\0" \
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
"update_sd_firmware_filename=u-boot.imx\0" \
"update_sd_firmware=" \
@@ -217,7 +232,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
diff --git a/include/palmas.h b/include/palmas.h
index 3b185896d6..aff48b5dfc 100644
--- a/include/palmas.h
+++ b/include/palmas.h
@@ -26,17 +26,90 @@
#include <common.h>
#include <i2c.h>
-/* I2C chip addresses */
-#define PALMAS_CHIP_ADDR 0x48
+/* I2C chip addresses, TW6035/37 */
+#define TWL603X_CHIP_P1 0x48 /* Page 1 */
+#define TWL603X_CHIP_P2 0x49 /* Page 2 */
+#define TWL603X_CHIP_P3 0x4a /* Page 3 */
-/* 0x1XY translates to page 1, register address 0xXY */
+/* TPS659038/39 */
+#define TPS65903X_CHIP_P1 0x58 /* Page 1 */
+
+/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
+
+/* LDO1 control/voltage */
+#define LDO1_CTRL 0x50
+#define LDO1_VOLTAGE 0x51
+
+/* LDO9 control/voltage */
#define LDO9_CTRL 0x60
#define LDO9_VOLTAGE 0x61
-/* Bit field definitions for LDOx_CTRL */
-#define LDO_ON (1 << 4)
-#define LDO_MODE_SLEEP (1 << 2)
-#define LDO_MODE_ACTIVE (1 << 0)
+/* LDOUSB control/voltage */
+#define LDOUSB_CTRL 0x64
+#define LDOUSB_VOLTAGE 0x65
+
+/* Control of 32 kHz audio clock */
+#define CLK32KGAUDIO_CTRL 0xd5
+
+/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
+#define SYSEN2_CTRL 0xd9
+
+/*
+ * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
+ * and some other xxx_CTRL resources:
+ */
+#define LDO9_BYP_EN (1 << 6) /* LDO9 only! */
+#define RSC_STAT_ON (1 << 4) /* RO status bit! */
+#define RSC_MODE_SLEEP (1 << 2)
+#define RSC_MODE_ACTIVE (1 << 0)
+
+/* Some LDO voltage values */
+#define LDO_VOLT_OFF 0
+#define LDO_VOLT_1V8 0x13
+#define LDO_VOLT_3V0 0x2b
+#define LDO_VOLT_3V3 0x31
+/* Request bypass, LDO9 only */
+#define LDO9_BYPASS 0x3f
+
+/* SMPS7_CTRL */
+#define SMPS7_CTRL 0x30
+
+/* SMPS9_CTRL */
+#define SMPS9_CTRL 0x38
+#define SMPS9_VOLTAGE 0x3b
+
+/* Bit field definitions for SMPSx_CTRL */
+#define SMPS_MODE_ACT_AUTO 1
+#define SMPS_MODE_ACT_ECO 2
+#define SMPS_MODE_ACT_FPWM 3
+#define SMPS_MODE_SLP_AUTO (1 << 2)
+#define SMPS_MODE_SLP_ECO (2 << 2)
+#define SMPS_MODE_SLP_FPWM (3 << 2)
+
+/*
+ * Some popular SMPS voltages, all with RANGE=1; note
+ * that RANGE cannot be changed on the fly
+ */
+#define SMPS_VOLT_OFF 0
+#define SMPS_VOLT_1V2 0x90
+#define SMPS_VOLT_1V8 0xae
+#define SMPS_VOLT_2V1 0xbd
+#define SMPS_VOLT_3V0 0xea
+#define SMPS_VOLT_3V3 0xf9
+
+/* Backup Battery & VRTC Control */
+#define BB_VRTC_CTRL 0xa8
+/* Bit definitions for BB_VRTC_CTRL */
+#define VRTC_EN_SLP (1 << 6)
+#define VRTC_EN_OFF (1 << 5)
+#define VRTC_PWEN (1 << 4)
+#define BB_LOW_ICHRG (1 << 3)
+#define BB_HIGH_ICHRG (0 << 3)
+#define BB_VSEL_3V0 (0 << 1)
+#define BB_VSEL_2V5 (1 << 1)
+#define BB_VSEL_3V15 (2 << 1)
+#define BB_VSEL_VBAT (3 << 1)
+#define BB_CHRG_EN (1 << 0)
/*
* Functions to read and write from TPS659038/TWL6035/TWL6037
@@ -54,5 +127,8 @@ static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
void palmas_init_settings(void);
int palmas_mmc1_poweron_ldo(void);
+int twl603x_mmc1_set_ldo9(u8 vsel);
+int twl603x_audio_power(u8 on);
+int twl603x_enable_bb_charge(u8 bb_fields);
#endif /* PALMAS_H */