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authorChris Packham <judge.packham@gmail.com>2018-09-08 21:39:04 +1200
committerTom Rini <trini@konsulko.com>2018-09-25 21:49:18 -0400
commit461f4568176b2dc2228f2a901f5c1a1b12a2ebc9 (patch)
tree39f8d38fca946eb5518d0e525b73179e43d7339c /include
parent29cfc096a7d3aeefdabbe4487097857ea821a553 (diff)
Add include/asm-generic/atomic.h
The arm, xtensa and mips version of atomic.h were already very similar (the mips one was a copy of xtensa). Combine these implementations together to produce a generic atomic.h that can be included by these architectures (and any others that need it in future). Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/atomic.h150
1 files changed, 150 insertions, 0 deletions
diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h
new file mode 100644
index 0000000000..94d0747194
--- /dev/null
+++ b/include/asm-generic/atomic.h
@@ -0,0 +1,150 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef _ASM_GENERIC_ATOMIC_H
+#define _ASM_GENERIC_ATOMIC_H
+
+typedef struct { volatile int counter; } atomic_t;
+#if BITS_PER_LONG == 32
+typedef struct { volatile long long counter; } atomic64_t;
+#else /* BIT_PER_LONG == 32 */
+typedef struct { volatile long counter; } atomic64_t;
+#endif
+
+#define ATOMIC_INIT(i) { (i) }
+
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v, i) ((v)->counter = (i))
+#define atomic64_read(v) atomic_read(v)
+#define atomic64_set(v, i) atomic_set(v, i)
+
+static inline void atomic_add(int i, atomic_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic_sub(int i, atomic_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic_inc(atomic_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ ++v->counter;
+ local_irq_restore(flags);
+}
+
+static inline void atomic_dec(atomic_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ --v->counter;
+ local_irq_restore(flags);
+}
+
+static inline int atomic_dec_and_test(volatile atomic_t *v)
+{
+ unsigned long flags = 0;
+ int val;
+
+ local_irq_save(flags);
+ val = v->counter;
+ v->counter = val -= 1;
+ local_irq_restore(flags);
+
+ return val == 0;
+}
+
+static inline int atomic_add_negative(int i, volatile atomic_t *v)
+{
+ unsigned long flags = 0;
+ int val;
+
+ local_irq_save(flags);
+ val = v->counter;
+ v->counter = val += i;
+ local_irq_restore(flags);
+
+ return val < 0;
+}
+
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ *addr &= ~mask;
+ local_irq_restore(flags);
+}
+
+#if BITS_PER_LONG == 32
+
+static inline void atomic64_add(long long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic64_sub(long long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+
+#else /* BIT_PER_LONG == 32 */
+
+static inline void atomic64_add(long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic64_sub(long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+#endif
+
+static inline void atomic64_inc(volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += 1;
+ local_irq_restore(flags);
+}
+
+static inline void atomic64_dec(volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= 1;
+ local_irq_restore(flags);
+}
+
+#endif