diff options
| author | Ying Zhang <b40530@freescale.com> | 2013-08-16 15:16:12 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-20 09:47:38 -0700 |
| commit | 7c8eea59b8c3b124d23b41f887bc525cf2adec30 (patch) | |
| tree | a299ef92b0d8297fe7b3e7bf44cf3fdf815cb71d /include | |
| parent | bb0dc1084f5dcf1dfd951d320c932d08bccbe429 (diff) | |
powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/P1022DS.h | 54 |
1 files changed, 47 insertions, 7 deletions
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 5ca7f07797..6db0c2700b 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -16,11 +16,32 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RAMBOOT_SDCARD -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_MMC_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_PAD_TO 0x18000 +#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_MMC_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif #endif #ifdef CONFIG_SPIFLASH @@ -291,6 +312,24 @@ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) /* + * Config the L2 Cache as L2 SRAM +*/ +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SDCARD) +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#endif +#endif + +/* * Serial Port */ #define CONFIG_CONS_INDEX 1 @@ -298,7 +337,7 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) #define CONFIG_NS16550_MIN_FUNCTIONS #endif @@ -529,8 +568,9 @@ #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_RAMBOOT_SDCARD) +#elif defined(CONFIG_SDCARD) #define CONFIG_ENV_IS_IN_MMC +#define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 #elif defined(CONFIG_NAND) |