diff options
| author | Shaohui Xie <Shaohui.Xie@freescale.com> | 2013-09-22 09:56:02 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-10-16 16:13:12 -0700 |
| commit | 83d925668f4efc9605040f938ea444fe809a844c (patch) | |
| tree | ef491f4dd36907de972d4293e4edb6797fb5c0ad /include | |
| parent | ef9a1f9a4f9576f345308351c707b3ce85d0451f (diff) | |
powerpc/B4860: enable PBL tool for B4860
Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which
uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a
pbl boot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/B4860QDS.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index aa62d94eac..992aea7f55 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -16,6 +16,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg +#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE |