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authorTom Rini <trini@konsulko.com>2016-03-20 18:09:34 -0400
committerTom Rini <trini@konsulko.com>2016-03-20 18:09:34 -0400
commit83d95b67d3731e39292d858924ade3be68c167af (patch)
tree8f7ca00720b53d66bb879068f73f54ed402f3bb9 /include
parent1b108880e6433e398681785f51b2a2dca983cd1b (diff)
parent93d9fc26cb7b4fcbb849e79d21d16b114e4501a9 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include')
-rw-r--r--include/configs/socfpga_common.h8
-rw-r--r--include/configs/socfpga_sr1500.h25
2 files changed, 23 insertions, 10 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index cd48c9e1ca..56d32e6b53 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -284,7 +284,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+#if !defined(CONFIG_ENV_SIZE)
#define CONFIG_ENV_SIZE 4096
+#endif
/* Environment for SDMMC boot */
#if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)
@@ -292,6 +294,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
#endif
+/* Environment for QSPI boot */
+#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0x00100000
+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
+#endif
+
/*
* mtd partitioning for serial NOR flash
*
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index fdf67ca098..6414eeb914 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -92,23 +92,28 @@
#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8
#define CONFIG_SYS_BOOTCOUNT_BE
-/* The rest of the configuration is shared */
-#include <configs/socfpga_common.h>
-
-/* U-Boot payload is stored at offset 0x60000 */
-#undef CONFIG_SYS_SPI_U_BOOT_OFFS
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x60000
-
/* Environment setting for SPI flash */
-#undef CONFIG_ENV_SIZE
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
-#define CONFIG_ENV_OFFSET 0x00040000
+#define CONFIG_ENV_OFFSET 0x000e0000
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_MODE SPI_MODE_3
-#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SPI_MAX_HZ 100000000 /* Use max of 100MHz */
+#define CONFIG_SF_DEFAULT_SPEED 100000000
+
+/*
+ * The QSPI NOR flash layout on SR1500:
+ *
+ * 0000.0000 - 0003.ffff: SPL (4 times)
+ * 0004.0000 - 000d.ffff: U-Boot
+ * 000e.0000 - 000e.ffff: env1
+ * 000f.0000 - 000f.ffff: env2
+ */
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
#endif /* __CONFIG_SOCFPGA_SR1500_H__ */