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authorTien Fong Chee <tien.fong.chee@intel.com>2019-02-12 20:41:34 +0800
committerMichal Simek <michal.simek@xilinx.com>2019-04-16 11:51:33 +0200
commit9184c92f46da7a0cd53a806046e56911b61c90e2 (patch)
tree3f5b178ad00d6f5b9421ea0bf991cf4cbfb47bff /include
parent216800acf1fbf9f498455bf3c92d4513d9a4c681 (diff)
fpga: Add support for getting external data address and length
This function supports getting both data address and length for existing FPGA subimage and FPGA external data. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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