diff options
| author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2018-05-31 15:10:23 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-06-01 11:37:31 +0200 |
| commit | a18d09ea384fb66105fbfa24fd2d1288754b8f07 (patch) | |
| tree | af4d25c51294ee29d8fdd1356dd5080b37bee56a /include | |
| parent | cedd48e2cdb752444444a97157025f16e63ee446 (diff) | |
fpga: zynqmp: Add secure bitstream loading for ZynqMP
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/xilinx.h | 4 | ||||
| -rw-r--r-- | include/zynqmppl.h | 3 |
2 files changed, 7 insertions, 0 deletions
diff --git a/include/xilinx.h b/include/xilinx.h index 9429f51b48..af40befa52 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -48,6 +48,8 @@ typedef struct { /* typedef xilinx_desc */ struct xilinx_fpga_op { int (*load)(xilinx_desc *, const void *, size_t, bitstream_type); int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *); + int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info); int (*dump)(xilinx_desc *, const void *, size_t); int (*info)(xilinx_desc *); }; @@ -60,6 +62,8 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize); int xilinx_info(xilinx_desc *desc); int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, fpga_fs_info *fpga_fsinfo); +int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info); /* Board specific implementation specific function types *********************************************************************/ diff --git a/include/zynqmppl.h b/include/zynqmppl.h index a0f4e68a0c..5214db99fb 100644 --- a/include/zynqmppl.h +++ b/include/zynqmppl.h @@ -16,6 +16,9 @@ #define ZYNQMP_FPGA_OP_LOAD (1 << 1) #define ZYNQMP_FPGA_OP_DONE (1 << 2) +#define ZYNQMP_FPGA_FLAG_AUTHENTICATED BIT(2) +#define ZYNQMP_FPGA_FLAG_ENCRYPTED BIT(3) + #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15 #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \ ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT) |