diff options
| author | Tom Rini <trini@konsulko.com> | 2018-12-07 19:02:01 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-12-07 19:02:01 -0500 |
| commit | c49aff3e66b930aa06936afee401cf5e19377958 (patch) | |
| tree | 836506695f3a38370108ec2060f23ef2954da0f9 /include | |
| parent | 10d3e90f46feace58f4141b696d91644e594e3ed (diff) | |
| parent | 8a6121ea078347de017c833e131eb4a806cf0c51 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
Diffstat (limited to 'include')
| -rw-r--r-- | include/axp209.h | 70 |
1 files changed, 54 insertions, 16 deletions
diff --git a/include/axp209.h b/include/axp209.h index b7de6ed73c..f4f1b2fe56 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -3,11 +3,14 @@ * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net> */ +#include <linux/bitops.h> + enum axp209_reg { AXP209_POWER_STATUS = 0x00, AXP209_CHIP_VERSION = 0x03, AXP209_OUTPUT_CTRL = 0x12, AXP209_DCDC2_VOLTAGE = 0x23, + AXP209_VRC_DCDC2_LDO3 = 0x25, AXP209_DCDC3_VOLTAGE = 0x27, AXP209_LDO24_VOLTAGE = 0x28, AXP209_LDO3_VOLTAGE = 0x29, @@ -20,29 +23,64 @@ enum axp209_reg { AXP209_SHUTDOWN = 0x32, }; -#define AXP209_POWER_STATUS_ON_BY_DC (1 << 0) -#define AXP209_POWER_STATUS_VBUS_USABLE (1 << 4) +#define AXP209_POWER_STATUS_ON_BY_DC BIT(0) +#define AXP209_POWER_STATUS_VBUS_USABLE BIT(4) + +#define AXP209_CHIP_VERSION_MASK 0x0f + +#define AXP209_OUTPUT_CTRL_EXTEN BIT(0) +#define AXP209_OUTPUT_CTRL_DCDC3 BIT(1) +#define AXP209_OUTPUT_CTRL_LDO2 BIT(2) +#define AXP209_OUTPUT_CTRL_LDO4 BIT(3) +#define AXP209_OUTPUT_CTRL_DCDC2 BIT(4) +#define AXP209_OUTPUT_CTRL_LDO3 BIT(6) + +/* + * AXP209 datasheet contains wrong information about LDO3 VRC: + * - VRC is actually enabled when BIT(1) is True + * - VRC is actually not enabled by default (BIT(3) = 0 after reset) + */ +#define AXP209_VRC_LDO3_EN BIT(3) +#define AXP209_VRC_DCDC2_EN BIT(2) +#define AXP209_VRC_LDO3_800uV_uS (BIT(1) | AXP209_VRC_LDO3_EN) +#define AXP209_VRC_LDO3_1600uV_uS AXP209_VRC_LDO3_EN +#define AXP209_VRC_DCDC2_800uV_uS (BIT(0) | AXP209_VRC_DCDC2_EN) +#define AXP209_VRC_DCDC2_1600uV_uS AXP209_VRC_DCDC2_EN +#define AXP209_VRC_LDO3_MASK 0xa +#define AXP209_VRC_DCDC2_MASK 0x5 +#define AXP209_VRC_DCDC2_SLOPE_SET(reg, cfg) \ + (((reg) & ~AXP209_VRC_DCDC2_MASK) | \ + ((cfg) & AXP209_VRC_DCDC2_MASK)) +#define AXP209_VRC_LDO3_SLOPE_SET(reg, cfg) \ + (((reg) & ~AXP209_VRC_LDO3_MASK) | \ + ((cfg) & AXP209_VRC_LDO3_MASK)) + +#define AXP209_LDO24_LDO2_MASK 0xf0 +#define AXP209_LDO24_LDO4_MASK 0x0f +#define AXP209_LDO24_LDO2_SET(reg, cfg) \ + (((reg) & ~AXP209_LDO24_LDO2_MASK) | \ + (((cfg) << 4) & AXP209_LDO24_LDO2_MASK)) +#define AXP209_LDO24_LDO4_SET(reg, cfg) \ + (((reg) & ~AXP209_LDO24_LDO4_MASK) | \ + (((cfg) << 0) & AXP209_LDO24_LDO4_MASK)) -#define AXP209_OUTPUT_CTRL_EXTEN (1 << 0) -#define AXP209_OUTPUT_CTRL_DCDC3 (1 << 1) -#define AXP209_OUTPUT_CTRL_LDO2 (1 << 2) -#define AXP209_OUTPUT_CTRL_LDO4 (1 << 3) -#define AXP209_OUTPUT_CTRL_DCDC2 (1 << 4) -#define AXP209_OUTPUT_CTRL_LDO3 (1 << 6) +#define AXP209_LDO3_VOLTAGE_FROM_LDO3IN BIT(7) +#define AXP209_LDO3_VOLTAGE_MASK 0x7f +#define AXP209_LDO3_VOLTAGE_SET(x) ((x) & AXP209_LDO3_VOLTAGE_MASK) -#define AXP209_IRQ5_PEK_UP (1 << 6) -#define AXP209_IRQ5_PEK_DOWN (1 << 5) +#define AXP209_IRQ5_PEK_UP BIT(6) +#define AXP209_IRQ5_PEK_DOWN BIT(5) -#define AXP209_POWEROFF (1 << 7) +#define AXP209_POWEROFF BIT(7) /* For axp_gpio.c */ #define AXP_POWER_STATUS 0x00 -#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) +#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) #define AXP_GPIO0_CTRL 0x90 #define AXP_GPIO1_CTRL 0x92 #define AXP_GPIO2_CTRL 0x93 -#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ -#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ -#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ +#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ +#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ +#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ #define AXP_GPIO_STATE 0x94 -#define AXP_GPIO_STATE_OFFSET 4 +#define AXP_GPIO_STATE_OFFSET 4 |