diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2017-11-28 16:04:16 +0800 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-11-30 22:55:26 +0100 |
| commit | daeed1dbb5026de081298d1e39c290625d71f137 (patch) | |
| tree | e425929e697024ce8be1b3faa3972958dc227452 /include | |
| parent | bbd6e6d729067e155a2f415b4722cbf1b33a71eb (diff) | |
rockchip: rk3128: add soc basic support
RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/rk3128_common.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h new file mode 100644 index 0000000000..e915a562b9 --- /dev/null +++ b/include/configs/rk3128_common.h @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_RK3128_COMMON_H +#define __CONFIG_RK3128_COMMON_H + +#include "rockchip-common.h" + +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SKIP_LOWLEVEL_INIT + +#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) +#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) + +#define CONFIG_SYS_NS16550_MEM32 + +#define CONFIG_SYS_TEXT_BASE 0x60000000 +#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 +#define CONFIG_SYS_LOAD_ADDR 0x60800800 + +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ + +/* MMC/SD IP block */ +#define CONFIG_BOUNCE_BUFFER + +#define CONFIG_SUPPORT_VFAT +#define CONFIG_FS_EXT4 + +/* RAW SD card / eMMC locations. */ +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) + +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CONFIG_NR_DRAM_BANKS 2 +#define SDRAM_MAX_SIZE 0x80000000 + +#define CONFIG_SPI_FLASH +#define CONFIG_SPI +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 + +#ifndef CONFIG_SPL_BUILD + +/* usb mass storage */ +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x60500000\0" \ + "pxefile_addr_r=0x60600000\0" \ + "fdt_addr_r=0x61f00000\0" \ + "kernel_addr_r=0x62000000\0" \ + "ramdisk_addr_r=0x64000000\0" + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + "partitions=" PARTS_DEFAULT \ + BOOTENV + +#endif + +#endif |