diff options
| author | wdenk <wdenk> | 2004-12-31 09:32:47 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-12-31 09:32:47 +0000 |
| commit | e2ffd59b4d93c9149de1caaa087371b0cfc512c9 (patch) | |
| tree | 86cfb6e30bec1686253b0542d76f57c5d62d183a /include | |
| parent | 400ab719c6025c176c50bcdff342384222d7424b (diff) | |
* Code cleanup, mostly for GCC-3.3.x
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
additional ethernet addresses.
* Cleanup drivers/i82365.c - avoid duplication of code
* Fix bogus "cannot span across banks" flash error message
* Add support for CompactFlash for the CPC45 Board.
Diffstat (limited to 'include')
31 files changed, 286 insertions, 19 deletions
diff --git a/include/asm-ppc/u-boot.h b/include/asm-ppc/u-boot.h index 72eabb495d..f8282d40c9 100644 --- a/include/asm-ppc/u-boot.h +++ b/include/asm-ppc/u-boot.h @@ -86,15 +86,15 @@ typedef struct bd_info { hymod_conf_t bi_hymod_conf; /* hymod configuration information */ #endif -#if defined(CONFIG_ETH1ADDR) +#ifdef CONFIG_HAS_ETH1 /* second onboard ethernet port */ unsigned char bi_enet1addr[6]; #endif -#if defined(CONFIG_ETH2ADDR) +#ifdef CONFIG_HAS_ETH2 /* third onboard ethernet port */ unsigned char bi_enet2addr[6]; #endif -#if defined(CONFIG_ETH3ADDR) +#ifdef CONFIG_HAS_ETH3 unsigned char bi_enet3addr[6]; #endif diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h index 5cf2a04119..5ab6fe63f8 100644 --- a/include/configs/Alaska8220.h +++ b/include/configs/Alaska8220.h @@ -106,6 +106,7 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_BOOTARGS "root=/dev/ram rw" #define CONFIG_ETHADDR 00:e0:0c:bc:e0:60 +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:e0:0c:bc:e0:61 #define CONFIG_IPADDR 192.162.1.2 #define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 15420474df..d64dd2a17e 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -98,6 +98,7 @@ /* Ethernet stuff */ #define CONFIG_ENV_OVERWRITE /* Let the user to change the Ethernet MAC addresses */ #define CONFIG_ETHADDR 00:50:C2:1E:AF:FE +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:50:C2:1E:AF:FD #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h index 5a00133775..8de981981d 100644 --- a/include/configs/CPC45.h +++ b/include/configs/CPC45.h @@ -50,8 +50,6 @@ #define CONFIG_BAUDRATE 9600 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ - #define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" #define CONFIG_BOOTDELAY 5 @@ -63,7 +61,10 @@ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ CFG_CMD_EEPROM | \ + CFG_CMD_FAT | \ + CFG_CMD_FLASH | \ CFG_CMD_I2C | \ + CFG_CMD_IDE | \ CFG_CMD_PCI | \ CFG_CMD_SDRAM ) @@ -344,7 +345,7 @@ #define ST16552_B_BASE 0x80400000 /* ST16552 channel A */ #define BCSR_BASE 0x80600000 /* board control / status registers */ #define DISPLAY_BASE 0x80600040 /* DISPLAY base */ -#define PCMCIA_MEM_BASE 0x81000000 /* PCMCIA memory window base */ +#define PCMCIA_MEM_BASE 0x83000000 /* PCMCIA memory window base */ #define PCMCIA_IO_BASE 0xFE000000 /* PCMCIA IO window base */ @@ -464,4 +465,46 @@ #define PCI_ENET0_MEMADDR 0x82000000 #define PCI_PLX9030_IOADDR 0x82100000 #define PCI_PLX9030_MEMADDR 0x82100000 + +/*----------------------------------------------------------------------- + * PCMCIA stuff + *----------------------------------------------------------------------- + */ + +#define CONFIG_I82365 + +#define CFG_PCMCIA_MEM_ADDR PCMCIA_MEM_BASE +#define CFG_PCMCIA_MEM_SIZE 0x1000 + +#define CONFIG_PCMCIA_SLOT_A + +/*----------------------------------------------------------------------- + * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) + *----------------------------------------------------------------------- + */ + +#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ + +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_RESET /* reset for IDE not supported */ +#define CONFIG_IDE_LED /* LED for IDE is supported */ + +#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ + +#define CFG_ATA_IDE0_OFFSET 0x0000 +#define CONFIG_HMI10 + +#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR + +#define CFG_ATA_DATA_OFFSET CFG_PCMCIA_MEM_SIZE + +/* Offset for normal register accesses */ +#define CFG_ATA_REG_OFFSET CFG_PCMCIA_MEM_SIZE + +/* Offset for alternate registers */ +#define CFG_ATA_ALT_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x400) + +#define CONFIG_DOS_PARTITION + #endif /* __CONFIG_H */ diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index e318b274a7..d6ce8a873b 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -105,6 +105,7 @@ /* first ethernet */ #define CONFIG_ETHADDR 64:36:00:00:00:01 /* next two ethernet hwaddrs */ +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 64:36:00:00:00:02 /* in the atlantis 64360 we have only 2 ETH port on the board, if we use PCI it has its own MAC addr */ diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h index e58b63a458..fb0248102f 100644 --- a/include/configs/DB64460.h +++ b/include/configs/DB64460.h @@ -43,7 +43,9 @@ #define __LOCAL_H #define CONFIG_ETHADDR 64:46:00:00:00:01 +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 64:46:00:00:00:02 +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 64:46:00:00:00:03 #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/G2000.h b/include/configs/G2000.h index df4ed3902f..af96c7c70c 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -164,6 +164,7 @@ /* adding Ethernet setting: FTS OUI 00:11:0B */ /*----------------------------------------------------------------------------*/ #define CONFIG_ETHADDR 00:11:0B:00:00:01 +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:11:0B:00:00:02 #define CONFIG_IPADDR 10.48.8.178 #define CONFIG_IP1ADDR 10.48.8.188 diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 57212e0f69..2d7cf2f2e2 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -126,6 +126,7 @@ /* Ethernet stuff */ #define CONFIG_ENV_OVERWRITE /* Let the user to change the Ethernet MAC addresses */ #define CONFIG_ETHADDR 00:50:C2:1E:AF:FE +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:50:C2:1E:AF:FD /*----------------------------------------------------------------------- diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h index 9ec1c0834b..8aa18caa7e 100644 --- a/include/configs/ISPAN.h +++ b/include/configs/ISPAN.h @@ -177,8 +177,10 @@ /* Environment is in flash, there is little space left in Serial EEPROM */ #define CFG_ENV_IS_IN_FLASH #define CFG_ENV_SECT_SIZE 0x10000 /* We use one complete sector */ +#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) /*----------------------------------------------------------------------- * Hard Reset Configuration Words diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 17402f0c9f..91011be367 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -90,6 +90,7 @@ & ~CFG_CMD_DTT \ & ~CFG_CMD_EEPROM \ & ~CFG_CMD_ELF \ + & ~CFG_CMD_EXT2 \ & ~CFG_CMD_FDC \ & ~CFG_CMD_FDOS \ & ~CFG_CMD_HWFLOW \ @@ -106,6 +107,7 @@ & ~CFG_CMD_REISER \ & ~CFG_CMD_SCSI \ & ~CFG_CMD_SPI \ + & ~CFG_CMD_UNIVERSE\ & ~CFG_CMD_USB \ & ~CFG_CMD_VFD \ & ~CFG_CMD_XIMG ) diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index 0d5b05a803..6b7bdda77d 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -185,6 +185,7 @@ CFG_CMD_DTT | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ + CFG_CMD_EXT2 | \ CFG_CMD_FAT | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ @@ -198,6 +199,7 @@ CFG_CMD_REISER | \ CFG_CMD_SCSI | \ CFG_CMD_SPI | \ + CFG_CMD_UNIVERSE | \ CFG_CMD_USB | \ CFG_CMD_VFD | \ CFG_CMD_XIMG diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index a4018f8ced..88efd956d7 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -155,6 +155,7 @@ CFG_CMD_DTT | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ + CFG_CMD_EXT2 | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ CFG_CMD_HWFLOW | \ @@ -168,6 +169,7 @@ CFG_CMD_SCSI | \ CFG_CMD_SPI | \ CFG_CMD_VFD | \ + CFG_CMD_UNIVERSE | \ CFG_CMD_USB | \ CFG_CMD_XIMG ) ) diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index a53b963edc..874e962d1e 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -458,7 +458,9 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) #define CONFIG_ETHADDR 00:E0:0C:00:00:FD +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD #endif diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 9824241408..d4cba338b3 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -415,7 +415,9 @@ extern unsigned long get_clock_freq(void); /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) #define CONFIG_ETHADDR 00:E0:0C:00:00:FD +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD #endif diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 6b4191ef96..49518d8583 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -415,7 +415,9 @@ extern unsigned long get_clock_freq(void); /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) #define CONFIG_ETHADDR 00:E0:0C:00:00:FD +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD #endif diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2a31dd7d93..d58e6a7059 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -504,7 +504,9 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) #define CONFIG_ETHADDR 00:E0:0C:00:00:FD +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD #endif diff --git a/include/configs/OCOTEA.h b/include/configs/OCOTEA.h index 6f8fd1d55c..f69ab1b631 100644 --- a/include/configs/OCOTEA.h +++ b/include/configs/OCOTEA.h @@ -154,8 +154,11 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 10.1.2.3 #define CONFIG_ETHADDR 00:04:AC:E3:28:8A +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:04:AC:E3:28:8B +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:04:AC:E3:28:8C +#define CONFIG_HAS_ETH3 #define CONFIG_ETH3ADDR 00:04:AC:E3:28:8D #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ #define CONFIG_SERVERIP 10.1.2.2 diff --git a/include/configs/PN62.h b/include/configs/PN62.h index c58e990a19..5f748a0366 100644 --- a/include/configs/PN62.h +++ b/include/configs/PN62.h @@ -102,6 +102,8 @@ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() on init */ +#define CONFIG_HAS_ETH1 1 /* add support for eth1addr */ + #define CONFIG_SHOW_BOOT_PROGRESS 1 /* Show boot progress on LEDs */ /* diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 03020f2890..2ffe89f8c6 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -92,6 +92,7 @@ /* Ethernet stuff */ #define CONFIG_ENV_OVERWRITE /* Let the user to change the Ethernet MAC addresses */ #define CONFIG_ETHADDR 00:50:c2:1e:af:fe +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:50:c2:1e:af:fd #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 3592290d50..4623dbb887 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -98,6 +98,7 @@ ~CFG_CMD_BSP & \ ~CFG_CMD_DATE & \ ~CFG_CMD_DTT & \ + ~CFG_CMD_EXT2 & \ ~CFG_CMD_FDC & \ ~CFG_CMD_FDOS & \ ~CFG_CMD_HWFLOW & \ @@ -113,6 +114,7 @@ ~CFG_CMD_SCSI & \ ~CFG_CMD_SETGETDCR & \ ~CFG_CMD_SPI & \ + ~CFG_CMD_UNIVERSE & \ ~CFG_CMD_USB & \ ~CFG_CMD_VFD & \ ~CFG_CMD_XIMG ) diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 3a09de91a7..60561eb22b 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -400,9 +400,11 @@ /*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) - #define CONFIG_ETHADDR 00:vv:ww:xx:yy:8a - #define CONFIG_ETH1ADDR 00:vv:ww:xx:yy:8b - #define CONFIG_ETH2ADDR 00:vv:ww:xx:yy:8c +# define CONFIG_ETHADDR 00:vv:ww:xx:yy:8a +# define CONFIG_HAS_ETH1 +# define CONFIG_ETH1ADDR 00:vv:ww:xx:yy:8b +# define CONFIG_HAS_ETH2 +# define CONFIG_ETH2ADDR 00:vv:ww:xx:yy:8c #endif #define CONFIG_SERVERIP YourServerIP diff --git a/include/configs/SBC8560.h b/include/configs/SBC8560.h index 8e3c3923d3..6bd0abe763 100644 --- a/include/configs/SBC8560.h +++ b/include/configs/SBC8560.h @@ -388,9 +388,11 @@ /*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) - #define CONFIG_ETHADDR 00:vv:ww:xx:yy:8a - #define CONFIG_ETH1ADDR 00:vv:ww:xx:yy:8b - #define CONFIG_ETH2ADDR 00:vv:ww:xx:yy:8c +# define CONFIG_ETHADDR 00:vv:ww:xx:yy:8a +# define CONFIG_HAS_ETH1 +# define CONFIG_ETH1ADDR 00:vv:ww:xx:yy:8b +# define CONFIG_HAS_ETH2 +# define CONFIG_ETH2ADDR 00:vv:ww:xx:yy:8c #endif #define CONFIG_SERVERIP YourServerIP diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index d6fa798075..195c036bb9 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -81,6 +81,8 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #endif +#define CONFIG_HAS_ETH1 + /*----------------------------------------------------------------------- * Definitions for status LED */ diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h index 3cc4ff41a1..023570077e 100644 --- a/include/configs/XPEDITE1K.h +++ b/include/configs/XPEDITE1K.h @@ -177,6 +177,10 @@ extern void out32(unsigned int, unsigned long); #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ +#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ +#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */ +#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */ + #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CFG_CMD_PCI | \ CFG_CMD_IRQ | \ @@ -186,7 +190,7 @@ extern void out32(unsigned int, unsigned long); CFG_CMD_EEPROM | \ CFG_CMD_PING | \ CFG_CMD_ELF | \ - CFG_CMD_MII | \ + CFG_CMD_MII | \ CFG_CMD_DIAG | \ CFG_CMD_FAT ) diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index a17d035300..1f9de350c8 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -277,6 +277,7 @@ CFG_CMD_DOC | \ CFG_CMD_DTT | \ CFG_CMD_EEPROM | \ + CFG_CMD_EXT2 | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ CFG_CMD_HWFLOW | \ @@ -291,6 +292,7 @@ CFG_CMD_REISER | \ CFG_CMD_SCSI | \ CFG_CMD_SPI | \ + CFG_CMD_UNIVERSE| \ CFG_CMD_USB | \ CFG_CMD_VFD | \ CFG_CMD_XIMG ) ) diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 6f19909614..90d6b25bdb 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -177,6 +177,7 @@ CFG_CMD_BEDBUG | \ CFG_CMD_BMP | \ CFG_CMD_DOC | \ + CFG_CMD_EXT2 | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ CFG_CMD_FPGA | \ @@ -191,6 +192,7 @@ CFG_CMD_REISER | \ CFG_CMD_SCSI | \ CFG_CMD_SPI | \ + CFG_CMD_UNIVERSE| \ CFG_CMD_VFD | \ CFG_CMD_XIMG ) ) diff --git a/include/configs/ml300.h b/include/configs/ml300.h index d36e3c725a..abad059ccf 100644 --- a/include/configs/ml300.h +++ b/include/configs/ml300.h @@ -58,7 +58,7 @@ #define CONFIG_SYSTEMACE 1 #define CONFIG_DOS_PARTITION 1 -#define CFG_SYSTEMACE_BASE XPAR_SYSACE_0_BASEADDR +#define CFG_SYSTEMACE_BASE XPAR_OPB_SYSACE_0_BASEADDR #define CFG_SYSTEMACE_WIDTH XPAR_XSYSACE_MEM_WIDTH #define CFG_ENV_IS_IN_EEPROM 1 /* environment is in EEPROM */ diff --git a/include/configs/quantum.h b/include/configs/quantum.h index d0ee7295b9..9140efb87a 100644 --- a/include/configs/quantum.h +++ b/include/configs/quantum.h @@ -199,7 +199,8 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x00F40000 /* Offset of Environment Sector absolute address 0xfff40000*/ -#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ +#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) /* Address and size of Redundant Environment Sector */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index cf5ef63d1a..8cf9eeb3d4 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -382,9 +382,11 @@ /*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) - #define CONFIG_ETHADDR 00:01:af:07:9b:8a - #define CONFIG_ETH1ADDR 00:01:af:07:9b:8b - #define CONFIG_ETH2ADDR 00:01:af:07:9b:8c +# define CONFIG_ETHADDR 00:01:af:07:9b:8a +# define CONFIG_HAS_ETH1 +# define CONFIG_ETH1ADDR 00:01:af:07:9b:8b +# define CONFIG_HAS_ETH2 +# define CONFIG_ETH2ADDR 00:01:af:07:9b:8c #endif #define CONFIG_SERVERIP 192.168.0.131 diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index f5b4836d70..e9261db30a 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -368,8 +368,10 @@ /*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) -#define CONFIG_ETHADDR 00:e0:0c:07:9b:8a +#define CONFIG_ETHADDR 00:e0:0c:07:9b:8a +#define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:e0:0c:07:9b:8b +#define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:e0:0c:07:9b:8c #endif diff --git a/include/pcmcia/cirrus.h b/include/pcmcia/cirrus.h new file mode 100644 index 0000000000..f53b85a323 --- /dev/null +++ b/include/pcmcia/cirrus.h @@ -0,0 +1,174 @@ +/* + * cirrus.h 1.4 1999/10/25 20:03:34 + * + * The contents of this file are subject to the Mozilla Public License + * Version 1.1 (the "License"); you may not use this file except in + * compliance with the License. You may obtain a copy of the License + * at http://www.mozilla.org/MPL/ + * + * Software distributed under the License is distributed on an "AS IS" + * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See + * the License for the specific language governing rights and + * limitations under the License. + * + * The initial developer of the original code is David A. Hinds + * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds + * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. + * + * Alternatively, the contents of this file may be used under the + * terms of the GNU General Public License version 2 (the "GPL"), in which + * case the provisions of the GPL are applicable instead of the + * above. If you wish to allow the use of your version of this file + * only under the terms of the GPL and not to allow others to use + * your version of this file under the MPL, indicate your decision by + * deleting the provisions above and replace them with the notice and + * other provisions required by the GPL. If you do not delete the + * provisions above, a recipient may use your version of this file + * under either the MPL or the GPL. + */ + +#ifndef _LINUX_CIRRUS_H +#define _LINUX_CIRRUS_H + +#ifndef PCI_VENDOR_ID_CIRRUS +#define PCI_VENDOR_ID_CIRRUS 0x1013 +#endif +#ifndef PCI_DEVICE_ID_CIRRUS_6729 +#define PCI_DEVICE_ID_CIRRUS_6729 0x1100 +#endif +#ifndef PCI_DEVICE_ID_CIRRUS_6832 +#define PCI_DEVICE_ID_CIRRUS_6832 0x1110 +#endif + +#define PD67_MISC_CTL_1 0x16 /* Misc control 1 */ +#define PD67_FIFO_CTL 0x17 /* FIFO control */ +#define PD67_MISC_CTL_2 0x1E /* Misc control 2 */ +#define PD67_CHIP_INFO 0x1f /* Chip information */ +#define PD67_ATA_CTL 0x026 /* 6730: ATA control */ +#define PD67_EXT_INDEX 0x2e /* Extension index */ +#define PD67_EXT_DATA 0x2f /* Extension data */ + +/* PD6722 extension registers -- indexed in PD67_EXT_INDEX */ +#define PD67_DATA_MASK0 0x01 /* Data mask 0 */ +#define PD67_DATA_MASK1 0x02 /* Data mask 1 */ +#define PD67_DMA_CTL 0x03 /* DMA control */ + +/* PD6730 extension registers -- indexed in PD67_EXT_INDEX */ +#define PD67_EXT_CTL_1 0x03 /* Extension control 1 */ +#define PD67_MEM_PAGE(n) ((n)+5) /* PCI window bits 31:24 */ +#define PD67_EXTERN_DATA 0x0a +#define PD67_MISC_CTL_3 0x25 +#define PD67_SMB_PWR_CTL 0x26 + +/* I/O window address offset */ +#define PD67_IO_OFF(w) (0x36+((w)<<1)) + +/* Timing register sets */ +#define PD67_TIME_SETUP(n) (0x3a + 3*(n)) +#define PD67_TIME_CMD(n) (0x3b + 3*(n)) +#define PD67_TIME_RECOV(n) (0x3c + 3*(n)) + +/* Flags for PD67_MISC_CTL_1 */ +#define PD67_MC1_5V_DET 0x01 /* 5v detect */ +#define PD67_MC1_MEDIA_ENA 0x01 /* 6730: Multimedia enable */ +#define PD67_MC1_VCC_3V 0x02 /* 3.3v Vcc */ +#define PD67_MC1_PULSE_MGMT 0x04 +#define PD67_MC1_PULSE_IRQ 0x08 +#define PD67_MC1_SPKR_ENA 0x10 +#define PD67_MC1_INPACK_ENA 0x80 + +/* Flags for PD67_FIFO_CTL */ +#define PD67_FIFO_EMPTY 0x80 + +/* Flags for PD67_MISC_CTL_2 */ +#define PD67_MC2_FREQ_BYPASS 0x01 +#define PD67_MC2_DYNAMIC_MODE 0x02 +#define PD67_MC2_SUSPEND 0x04 +#define PD67_MC2_5V_CORE 0x08 +#define PD67_MC2_LED_ENA 0x10 /* IRQ 12 is LED enable */ +#define PD67_MC2_FAST_PCI 0x10 /* 6729: PCI bus > 25 MHz */ +#define PD67_MC2_3STATE_BIT7 0x20 /* Floppy change bit */ +#define PD67_MC2_DMA_MODE 0x40 +#define PD67_MC2_IRQ15_RI 0x80 /* IRQ 15 is ring enable */ + +/* Flags for PD67_CHIP_INFO */ +#define PD67_INFO_SLOTS 0x20 /* 0 = 1 slot, 1 = 2 slots */ +#define PD67_INFO_CHIP_ID 0xc0 +#define PD67_INFO_REV 0x1c + +/* Fields in PD67_TIME_* registers */ +#define PD67_TIME_SCALE 0xc0 +#define PD67_TIME_SCALE_1 0x00 +#define PD67_TIME_SCALE_16 0x40 +#define PD67_TIME_SCALE_256 0x80 +#define PD67_TIME_SCALE_4096 0xc0 +#define PD67_TIME_MULT 0x3f + +/* Fields in PD67_DMA_CTL */ +#define PD67_DMA_MODE 0xc0 +#define PD67_DMA_OFF 0x00 +#define PD67_DMA_DREQ_INPACK 0x40 +#define PD67_DMA_DREQ_WP 0x80 +#define PD67_DMA_DREQ_BVD2 0xc0 +#define PD67_DMA_PULLUP 0x20 /* Disable socket pullups? */ + +/* Fields in PD67_EXT_CTL_1 */ +#define PD67_EC1_VCC_PWR_LOCK 0x01 +#define PD67_EC1_AUTO_PWR_CLEAR 0x02 +#define PD67_EC1_LED_ENA 0x04 +#define PD67_EC1_INV_CARD_IRQ 0x08 +#define PD67_EC1_INV_MGMT_IRQ 0x10 +#define PD67_EC1_PULLUP_CTL 0x20 + +/* Fields in PD67_MISC_CTL_3 */ +#define PD67_MC3_IRQ_MASK 0x03 +#define PD67_MC3_IRQ_PCPCI 0x00 +#define PD67_MC3_IRQ_EXTERN 0x01 +#define PD67_MC3_IRQ_PCIWAY 0x02 +#define PD67_MC3_IRQ_PCI 0x03 +#define PD67_MC3_PWR_MASK 0x0c +#define PD67_MC3_PWR_SERIAL 0x00 +#define PD67_MC3_PWR_TI2202 0x08 +#define PD67_MC3_PWR_SMB 0x0c + +/* Register definitions for Cirrus PD6832 PCI-to-CardBus bridge */ + +/* PD6832 extension registers -- indexed in PD67_EXT_INDEX */ +#define PD68_EXT_CTL_2 0x0b +#define PD68_PCI_SPACE 0x22 +#define PD68_PCCARD_SPACE 0x23 +#define PD68_WINDOW_TYPE 0x24 +#define PD68_EXT_CSC 0x2e +#define PD68_MISC_CTL_4 0x2f +#define PD68_MISC_CTL_5 0x30 +#define PD68_MISC_CTL_6 0x31 + +/* Extra flags in PD67_MISC_CTL_3 */ +#define PD68_MC3_HW_SUSP 0x10 +#define PD68_MC3_MM_EXPAND 0x40 +#define PD68_MC3_MM_ARM 0x80 + +/* Bridge Control Register */ +#define PD6832_BCR_MGMT_IRQ_ENA 0x0800 + +/* Socket Number Register */ +#define PD6832_SOCKET_NUMBER 0x004c /* 8 bit */ + + +typedef struct cirrus_state_t { + u_char misc1, misc2; + u_char timer[6]; +} cirrus_state_t; + +/* Cirrus options */ +static int has_dma = -1; +static int has_led = -1; +static int has_ring = -1; +static int dynamic_mode = 0; +static int freq_bypass = -1; +static int setup_time = -1; +static int cmd_time = -1; +static int recov_time = -1; + + +#endif /* _LINUX_CIRRUS_H */ |