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authorPhil Edworthy <PHIL.EDWORTHY@renesas.com>2016-11-29 12:58:27 +0000
committerJagan Teki <jagan@amarulasolutions.com>2016-12-15 16:57:27 +0100
commit32068c42a7230ad1ef756ed7a201cc3b3c580076 (patch)
tree0b7528f3b0483325eb9da563ff8db71e413102b0 /lib/dhry
parentcc80a897e4fafbd9e9b6920eb866f0600a5cd5ee (diff)
spi: cadence_qspi: Fix baud rate calculation
With the existing code, when the requested SPI clock rate is near to the lowest that can be achieved by the hardware (max divider of the ref clock is 32), the generated clock rate is wrong. For example, with a 50MHz ref clock, when asked for anything less than a 1.5MHz SPI clock, the code sets up the divider to generate 25MHz. This change fixes the calculation. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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