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authorMichal Simek <monstr@monstr.eu>2007-05-08 00:32:35 +0200
committerMichal Simek <monstr@monstr.eu>2007-05-08 00:32:35 +0200
commit3c4bd60de15d79ddfc0cf3170a55847b2025d93f (patch)
tree891b84b58f13a5f45536a243585b9d94c253a410 /lib_blackfin/cache.c
parentfb05f6da35ea1c15c553abe6f23f656bf18dc5db (diff)
parentac4cd59d59c9bf3f89cb7a344abf8184d678f562 (diff)
Merge git://www.denx.de/git/u-boot
Conflicts: include/asm-microblaze/microblaze_intc.h include/linux/stat.h
Diffstat (limited to 'lib_blackfin/cache.c')
-rw-r--r--lib_blackfin/cache.c33
1 files changed, 21 insertions, 12 deletions
diff --git a/lib_blackfin/cache.c b/lib_blackfin/cache.c
index 847278d226..9d71bcb547 100644
--- a/lib_blackfin/cache.c
+++ b/lib_blackfin/cache.c
@@ -1,7 +1,7 @@
/*
* U-boot - cache.c
*
- * Copyright (c) 2005 blackfin.uclinux.org
+ * Copyright (c) 2005-2007 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -21,20 +21,29 @@
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
*/
/* for now: just dummy functions to satisfy the linker */
-extern void blackfin_icache_range (unsigned long *, unsigned long *);
-extern void blackfin_dcache_range (unsigned long *, unsigned long *);
-void flush_cache (unsigned long dummy1, unsigned long dummy2)
+#include <config.h>
+#include <common.h>
+#include <asm/blackfin.h>
+#include "cache.h"
+
+void flush_cache(unsigned long dummy1, unsigned long dummy2)
{
- if (icache_status ()) {
- blackfin_icache_flush_range (dummy1, dummy1 + dummy2);
- }
- if (dcache_status ()) {
- blackfin_dcache_flush_range (dummy1, dummy1 + dummy2);
- }
+ if ((dummy1 >= L1_ISRAM) && (dummy1 < L1_ISRAM_END))
+ return;
+ if ((dummy1 >= DATA_BANKA_SRAM) && (dummy1 < DATA_BANKA_SRAM_END))
+ return;
+ if ((dummy1 >= DATA_BANKB_SRAM) && (dummy1 < DATA_BANKB_SRAM_END))
+ return;
+
+ if (icache_status())
+ blackfin_icache_flush_range((void*)dummy1, (void*)(dummy1 + dummy2));
+ if (dcache_status())
+ blackfin_dcache_flush_range((void*)dummy1, (void*)(dummy1 + dummy2));
+
return;
}