diff options
| author | wdenk <wdenk> | 2005-04-03 23:35:57 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2005-04-03 23:35:57 +0000 |
| commit | 50712ba16e7e469e90952a7f197efa46e2f8e311 (patch) | |
| tree | 4a6bf30c2ba3af8be123938f236eadca28c964d5 /lib_m68k/time.c | |
| parent | 901787d6e83b6a5beba5905fbc5441673dcd63e1 (diff) | |
* Patch by Mathias Küster, 23 Nov 2004:
add udelay support for the mcf5282 cpu
* Patch by Tolunay Orkun, 16 November 2004:
fix incorrect onboard Xilinx CPLD base address
Diffstat (limited to 'lib_m68k/time.c')
| -rw-r--r-- | lib_m68k/time.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/lib_m68k/time.c b/lib_m68k/time.c index fb997b5b49..e2c1b060b4 100644 --- a/lib_m68k/time.c +++ b/lib_m68k/time.c @@ -131,6 +131,28 @@ void set_timer (ulong t) void udelay(unsigned long usec) { + volatile unsigned short *timerp; + uint tmp; + + timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE3); + + while (usec > 0) { + if (usec > 65000) + tmp = 65000; + else + tmp = usec; + usec = usec - tmp; + + /* Set up TIMER 3 as timebase clock */ + timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW; + timerp[MCFTIMER_PMR] = 0; + /* set period to 1 us */ + timerp[MCFTIMER_PCSR] = + (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW; + + timerp[MCFTIMER_PMR] = tmp; + while (timerp[MCFTIMER_PCNTR] > 0); + } } void timer_init (void) |