ppc4xx: Remove 4xx NAND booting support

As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.

This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>

4 files changed, 0 insertions, 229 deletions

diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile
deleted file mode 100644
index f975b725eb..0000000000
--- a/nand_spl/board/amcc/bamboo/Makefile
+++ /dev/null
@@ -1,70 +0,0 @@
-#
-# (C) Copyright 2007
-# Stefan Roese, DENX Software Engineering, sr@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
-
-nandobj	:= $(OBJTREE)/nand_spl/
-
-LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
-	   $(LDFLAGS_FINAL)
-asflags-y += -DCONFIG_NAND_SPL
-ccflags-y += -DCONFIG_NAND_SPL
-
-SOBJS	= start.o init.o resetvec.o
-COBJS	= nand_boot.o nand_ecc.o ndfc.o sdram.o
-
-OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-targets += $(__OBJS)
-
-all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-		-Map $(nandobj)u-boot-spl.map -o $@
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
-
-# create symbolic links for common files
-
-# from cpu directory
-$(obj)/ndfc.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $@
-
-$(obj)/resetvec.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $@
-
-$(obj)/start.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $@
-
-# from board directory
-$(obj)/init.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/board/amcc/bamboo/init.S $@
-
-# from nand_spl directory
-$(obj)/nand_boot.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/nand_spl/nand_boot.c $@
-
-# from drivers/mtd/nand directory
-$(obj)/nand_ecc.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/drivers/mtd/nand/nand_ecc.c $@
diff --git a/nand_spl/board/amcc/bamboo/config.mk b/nand_spl/board/amcc/bamboo/config.mk
deleted file mode 100644
index 6cc8fa30f3..0000000000
--- a/nand_spl/board/amcc/bamboo/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2007
-# Stefan Roese, DENX Software Engineering, sr@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-#
-# AMCC 440EP Reference Platform (Bamboo) board
-#
-
-#
-# CONFIG_SYS_TEXT_BASE for SPL:
-#
-# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff,
-# in the last 4kBytes of memory space in cache.
-# We will copy this SPL into instruction-cache in start.S. So we set
-# CONFIG_SYS_TEXT_BASE to starting address in i-cache here.
-#
-CONFIG_SYS_TEXT_BASE = 0x00800000
-
-# PAD_TO used to generate a 16kByte binary needed for the combined image
-# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000
-PAD_TO	= 0x00804000
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
-endif
diff --git a/nand_spl/board/amcc/bamboo/sdram.c b/nand_spl/board/amcc/bamboo/sdram.c
deleted file mode 100644
index df0dfc1a0d..0000000000
--- a/nand_spl/board/amcc/bamboo/sdram.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * (C) Copyright 2007
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-
-static void wait_init_complete(void)
-{
-	u32 val;
-
-	do {
-		mfsdram(SDRAM0_MCSTS, val);
-	} while (!(val & 0x80000000));
-}
-
-/*
- * phys_size_t initdram(int board_type)
- *
- * As the name already indicates, this function is called very early
- * from start.S and configures the SDRAM with fixed values. This is needed,
- * since the 440EP has no internal SRAM and the 4kB NAND_SPL loader has
- * not enough free space to implement the complete I2C SPD DDR autodetection
- * routines. Therefore the Bamboo only supports the onboard 64MBytes of SDRAM
- * when booting from NAND flash.
- *
- * Note:
- * As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed
- * DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM
- * modules are still plugged in. So it is recommended to remove the DIMM
- * modules while using the NAND booting code with the fixed SDRAM setup!
- */
-phys_size_t initdram(int board_type)
-{
-	/*
-	 * Soft-reset SDRAM controller.
-	 */
-	mtsdr(SDR0_SRST, SDR0_SRST_DMC);
-	mtsdr(SDR0_SRST, 0x00000000);
-
-	/*
-	 * Disable memory controller.
-	 */
-	mtsdram(SDRAM0_CFG0, 0x00000000);
-
-	/*
-	 * Setup some default
-	 */
-	mtsdram(SDRAM0_UABBA, 0x00000000); /* ubba=0 (default)		*/
-	mtsdram(SDRAM0_SLIO, 0x00000000);	/* rdre=0 wrre=0 rarw=0		*/
-	mtsdram(SDRAM0_DEVOPT, 0x00000000); /* dll=0 ds=0 (normal)		*/
-	mtsdram(SDRAM0_WDDCTR, 0x00000000); /* wrcp=0 dcd=0		*/
-	mtsdram(SDRAM0_CLKTR, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0	*/
-
-	/*
-	 * Following for CAS Latency = 2.5 @ 133 MHz PLB
-	 */
-	mtsdram(SDRAM0_B0CR, 0x00082001);
-	mtsdram(SDRAM0_TR0, 0x41094012);
-	mtsdram(SDRAM0_TR1, 0x8080083d);	/* SS=T2 SL=STAGE 3 CD=1 CT=0x00*/
-	mtsdram(SDRAM0_RTR, 0x04100000);	/* Interval 7.8µs @ 133MHz PLB	*/
-	mtsdram(SDRAM0_CFG1, 0x00000000);	/* Self-refresh exit, disable PM*/
-
-	/*
-	 * Enable the controller, then wait for DCEN to complete
-	 */
-	mtsdram(SDRAM0_CFG0, 0x80000000); /* DCEN=1, PMUD=0*/
-	wait_init_complete();
-
-	return CONFIG_SYS_MBYTES_SDRAM << 20;
-}
diff --git a/nand_spl/board/amcc/bamboo/u-boot.lds b/nand_spl/board/amcc/bamboo/u-boot.lds
deleted file mode 100644
index c432368175..0000000000
--- a/nand_spl/board/amcc/bamboo/u-boot.lds
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * (C) Copyright 2007
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc:common)
-SECTIONS
-{
-  .resetvec 0x00800FFC :
-  {
-    KEEP(*(.resetvec))
-  } = 0xffff
-
-  .text      :
-  {
-    start.o	(.text)
-    init.o	(.text)
-    nand_boot.o	(.text)
-    sdram.o	(.text)
-    ndfc.o	(.text)
-
-    *(.text)
-    *(.fixup)
-  }
-  _etext = .;
-
-  .data    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-    *(.data*)
-    *(.sdata*)
-    __got2_start = .;
-    *(.got2)
-    __got2_end = .;
-  }
-
-  _edata  =  .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss)
-   *(.bss)
-   . = ALIGN(4);
-  }
-
-  __bss_end = . ;
-}