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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-04-20 22:05:49 +0200
committerSimon Glass <sjg@chromium.org>2017-05-10 13:37:21 -0600
commit8fa6979bebc91451d78ae49375a933f9e21cc755 (patch)
tree8fa31606079f333954c65b42e4e267e3cda7ec02 /post
parentda10dd1a723e27291d8f30effada2b0a47a43f12 (diff)
rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5
This change adds support for configuring the module clocks for SPI1 and SPI5 from the 594MHz GPLL. Note that the driver (rk_spi.c) always sets this to 99MHz, but the implemented functionality is more general and will also support different clock configurations. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
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