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| author | Tom Rini <trini@konsulko.com> | 2020-04-10 18:28:20 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-04-10 18:28:20 -0400 |
| commit | 1390c400846cf44b70f095ffd71306244f4cde0a (patch) | |
| tree | 79854db9d397131a6614e71a8a51a1edb00bf4df /test/py/u_boot_utils.py | |
| parent | 587e4a4296982f85b2a40fc8a704db65079e0aac (diff) | |
| parent | ddd4d99247182a8ec3f86c8cf8099f0f138f319e (diff) | |
Merge branch '2020-04-10-gitlab-travis-gcc9' into next
- Switch over to using GCC-9.2.0 in our Azure, GitLab and Travis-CI
instances
Diffstat (limited to 'test/py/u_boot_utils.py')
| -rw-r--r-- | test/py/u_boot_utils.py | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index bf2a0fc0e2..939d82eec1 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -237,10 +237,11 @@ def find_ram_base(u_boot_console): raise Exception('Failed to find RAM bank start in `bdinfo`') # We don't want ram_base to be zero as some functions test if the given - # address is NULL (0). Let's add 2MiB then (size of an ARM LPAE/v8 section). + # address is NULL (0). Besides, on some RISC-V targets the low memory + # is protected that prevents S-mode U-Boot from access. + # Let's add 2MiB then (size of an ARM LPAE/v8 section). - if ram_base == 0: - ram_base += 1024 * 1024 * 2 + ram_base += 1024 * 1024 * 2 return ram_base |