diff options
author | Tom Rini <trini@konsulko.com> | 2019-07-11 18:10:11 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2019-07-11 18:10:11 -0400 |
commit | a9758ece08bceb60634145c2126582e5d282bd09 (patch) | |
tree | b391039a3bc2aa8222a14b3e960541296d585878 /test | |
parent | 68deea2308141c26707da44654b273d7b072ab0d (diff) | |
parent | 7ea33579576d2bcd19df76bd8769e7ab3b4a169b (diff) |
Merge tag 'dm-pull-9jul19-take2' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
- Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
- Various other minor fixes
- Conversion of patman, dtoc and binman to support Python 3
Diffstat (limited to 'test')
-rw-r--r-- | test/dm/pci.c | 49 | ||||
-rw-r--r-- | test/py/tests/test_ofplatdata.py | 28 |
2 files changed, 77 insertions, 0 deletions
diff --git a/test/dm/pci.c b/test/dm/pci.c index a1febd54b7..c325f6600e 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -245,3 +245,52 @@ static int dm_test_pci_cap(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_pci_cap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test looking up BARs in EA capability structure */ +static int dm_test_pci_ea(struct unit_test_state *uts) +{ + struct udevice *bus, *swap; + void *bar; + int cap; + + /* + * use emulated device mapping function, we're not using real physical + * addresses in this test + */ + sandbox_set_enable_pci_map(true); + + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x01, 0), &swap)); + + /* look up PCI_CAP_ID_EA */ + cap = dm_pci_find_capability(swap, PCI_CAP_ID_EA); + ut_asserteq(PCI_CAP_ID_EA_OFFSET, cap); + + /* test swap case in BAR 1 */ + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_0, 0); + ut_assertnonnull(bar); + *(int *)bar = 2; /* swap upper/lower */ + + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); + ut_assertnonnull(bar); + strcpy(bar, "ea TEST"); + unmap_sysmem(bar); + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); + ut_assertnonnull(bar); + ut_asserteq_str("EA test", bar); + + /* test magic values in BARs2, 4; BAR 3 is n/a */ + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_2, 0); + ut_assertnonnull(bar); + ut_asserteq(PCI_EA_BAR2_MAGIC, *(u32 *)bar); + + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_3, 0); + ut_assertnull(bar); + + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_4, 0); + ut_assertnonnull(bar); + ut_asserteq(PCI_EA_BAR4_MAGIC, *(u32 *)bar); + + return 0; +} +DM_TEST(dm_test_pci_ea, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/py/tests/test_ofplatdata.py b/test/py/tests/test_ofplatdata.py index 98103ee71a..263334b074 100644 --- a/test/py/tests/test_ofplatdata.py +++ b/test/py/tests/test_ofplatdata.py @@ -2,6 +2,7 @@ # Copyright (c) 2016 Google, Inc import pytest +import u_boot_utils as util OF_PLATDATA_OUTPUT = ''' of-platdata probe: @@ -31,6 +32,15 @@ intarray 0 0 0 0 longbytearray 00 00 00 00 00 00 00 00 00 string <NULL> stringarray "one" "" "" +of-platdata probe: +bool 0 +byte 00 +bytearray 00 00 00 +int 0 +intarray 0 0 0 0 +longbytearray 00 00 00 00 00 00 00 00 00 +string <NULL> +stringarray "spl" "" "" ''' @pytest.mark.buildconfigspec('spl_of_platdata') @@ -40,3 +50,21 @@ def test_ofplatdata(u_boot_console): cons.restart_uboot_with_flags(['--show_of_platdata']) output = cons.get_spawn_output().replace('\r', '') assert OF_PLATDATA_OUTPUT in output + +@pytest.mark.buildconfigspec('spl_of_platdata') +def test_spl_devicetree(u_boot_console): + """Test content of spl device-tree""" + cons = u_boot_console + dtb = cons.config.build_dir + '/spl/u-boot-spl.dtb' + fdtgrep = cons.config.build_dir + '/tools/fdtgrep' + output = util.run_and_log(cons, [fdtgrep, '-l', dtb]) + + assert "u-boot,dm-pre-reloc" not in output + assert "u-boot,dm-pre-proper" not in output + assert "u-boot,dm-spl" not in output + assert "u-boot,dm-tpl" not in output + + assert "spl-test4" in output + assert "spl-test5" not in output + assert "spl-test6" not in output + assert "spl-test7" in output |