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authorDario Binacchi <dariobin@libero.it>2020-04-13 14:36:26 +0200
committerLukasz Majewski <lukma@denx.de>2020-08-24 11:03:26 +0200
commitcd16c57bd0d6c498d5c180d70c6f0f690e9c32de (patch)
tree447c890d5b4bd56f1e7e08d42f92bc40a8060816 /test
parent32f462ba3bf0c8794653e6ff92ca5cbec9856c54 (diff)
dm: test: clk: add the test for the ccf gated clock
Unlike the other clock types, in the case of the gated clock, a new driver has been developed which does not use the registering routine provided by the common clock framework. The addition of the ecspi0 clock to sandbox therefore allows testing the ccf gate clock. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'test')
-rw-r--r--test/dm/clk_ccf.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index 050fa80453..960cb2db0d 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -39,6 +39,14 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
rate = clk_get_parent_rate(clk);
ut_asserteq(rate, 20000000);
+ /* test the gate of CCF */
+ ret = clk_get_by_id(SANDBOX_CLK_ECSPI0, &clk);
+ ut_assertok(ret);
+ ut_asserteq_str("ecspi0", clk->dev->name);
+
+ rate = clk_get_parent_rate(clk);
+ ut_asserteq(rate, 20000000);
+
/* Test the mux of CCF */
ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk);
ut_assertok(ret);