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| author | Michal Simek <michal.simek@xilinx.com> | 2016-02-25 14:58:24 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-02-25 10:21:19 -0500 |
| commit | 299e5bb7c2377aa3d3b1ae74bceafadad71e8863 (patch) | |
| tree | 6c223d2d504894f49a941b5d7c348f4840c0de6d /tools/pbl_crc32.h | |
| parent | cdb714d7c9c5974a15ea4e37ef9ae111cd4bdf97 (diff) | |
test/py: Add option to skip SPL signature checking
Provide user option to skip SPL signature verification for cases where
u-boot is build with SPL support but full U-Boot is also verified
without SPL.
If you want to support this feature please add env__spl_skipped = True
to your boardenv configuration file.
For example Xilinx Zynq is using this feature where the same U-Boot
binary is checked with SPL and without SPL(with FSBL).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'tools/pbl_crc32.h')
0 files changed, 0 insertions, 0 deletions