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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2020-07-07 14:21:53 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2020-07-28 18:14:15 +0200 |
| commit | 346034a7a830d974530b94df8cb7d63011955785 (patch) | |
| tree | 4b6c36ccb78ad71b91f73930a956ecaa30707c0d /tools/prelink-riscv.inc | |
| parent | 0b73355ba26d51ccc23bde2a0e4f32e728672090 (diff) | |
arm: stm32mp: use correct weak function name spl_board_prepare_for_linux
Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.
This patch avoids warning with W=1 option:
u-boot/arch/arm/mach-stm32mp/spl.c:150:6:
warning: no previous prototype for ‘spl_board_prepare_for_boot_linux’
[-Wmissing-prototypes]
Fixes: dc7e5f190de5 ("arm: stm32mp: activate data cache on DDR in SPL")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'tools/prelink-riscv.inc')
0 files changed, 0 insertions, 0 deletions