diff options
| -rw-r--r-- | arch/x86/dts/bayleybay.dts | 2 | ||||
| -rw-r--r-- | arch/x86/dts/broadwell_som-6896.dts | 2 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 2 | ||||
| -rw-r--r-- | arch/x86/dts/chromebox_panther.dts | 2 | ||||
| -rw-r--r-- | arch/x86/dts/crownbay.dts | 2 | ||||
| -rw-r--r-- | arch/x86/dts/galileo.dts | 2 | ||||
| -rw-r--r-- | arch/x86/dts/minnowmax.dts | 2 | ||||
| -rw-r--r-- | drivers/spi/ich.c | 28 |
8 files changed, 31 insertions, 11 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index fbca46762c..cdd51215c1 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -187,7 +187,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich9-spi"; spi-flash@0 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts index 7b2c51504b..4bb0a34b5f 100644 --- a/arch/x86/dts/broadwell_som-6896.dts +++ b/arch/x86/dts/broadwell_som-6896.dts @@ -37,7 +37,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich9-spi"; spi-flash@0 { reg = <0>; compatible = "winbond,w25q128", "spi-flash"; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 58072031df..e5d77b6e25 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -255,7 +255,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich9-spi"; spi-flash@0 { #size-cells = <1>; #address-cells = <1>; diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index 48f0c77d45..ce8825fc87 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -59,7 +59,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich9-spi"; spi-flash@0 { #size-cells = <1>; #address-cells = <1>; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 47fab0fda6..ee8302cf7e 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -230,7 +230,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich7-spi"; spi-flash@0 { reg = <0>; compatible = "sst,25vf016b", diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index dd75fc4dc9..a9b2994016 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -118,7 +118,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich7-spi"; spi-flash@0 { #size-cells = <1>; #address-cells = <1>; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 7afdf6c30b..5b4da6c003 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -221,7 +221,7 @@ spi: spi { #address-cells = <1>; #size-cells = <0>; - compatible = "intel,ich-spi"; + compatible = "intel,ich9-spi"; spi-flash@0 { #address-cells = <1>; #size-cells = <1>; diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 22b5419368..b863539e1b 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -18,6 +18,8 @@ #include "ich.h" +DECLARE_GLOBAL_DATA_PTR; + #ifdef DEBUG_TRACE #define debug_trace(fmt, args...) debug(fmt, ##args) #else @@ -594,9 +596,6 @@ static int ich_spi_probe(struct udevice *dev) uint8_t bios_cntl; int ret; - /* Check the ICH version */ - plat->ich_version = pch_get_version(dev->parent); - ret = ich_init_controller(dev, plat, priv); if (ret) return ret; @@ -658,6 +657,25 @@ static int ich_spi_child_pre_probe(struct udevice *dev) return 0; } +static int ich_spi_ofdata_to_platdata(struct udevice *dev) +{ + struct ich_spi_platdata *plat = dev_get_platdata(dev); + int ret; + + ret = fdt_node_check_compatible(gd->fdt_blob, dev->of_offset, + "intel,ich7-spi"); + if (ret == 0) { + plat->ich_version = PCHV_7; + } else { + ret = fdt_node_check_compatible(gd->fdt_blob, dev->of_offset, + "intel,ich9-spi"); + if (ret == 0) + plat->ich_version = PCHV_9; + } + + return ret; +} + static const struct dm_spi_ops ich_spi_ops = { .xfer = ich_spi_xfer, .set_speed = ich_spi_set_speed, @@ -669,7 +687,8 @@ static const struct dm_spi_ops ich_spi_ops = { }; static const struct udevice_id ich_spi_ids[] = { - { .compatible = "intel,ich-spi" }, + { .compatible = "intel,ich7-spi" }, + { .compatible = "intel,ich9-spi" }, { } }; @@ -678,6 +697,7 @@ U_BOOT_DRIVER(ich_spi) = { .id = UCLASS_SPI, .of_match = ich_spi_ids, .ops = &ich_spi_ops, + .ofdata_to_platdata = ich_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct ich_spi_platdata), .priv_auto_alloc_size = sizeof(struct ich_spi_priv), .child_pre_probe = ich_spi_child_pre_probe, |