summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--drivers/serial/serial_stm32x7.c17
-rw-r--r--drivers/serial/serial_stm32x7.h2
2 files changed, 9 insertions, 10 deletions
diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
index 05c73da230..bf118a78cf 100644
--- a/drivers/serial/serial_stm32x7.c
+++ b/drivers/serial/serial_stm32x7.c
@@ -19,16 +19,9 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
{
struct stm32x7_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
- u32 clock, int_div, mantissa, fraction, oversampling;
+ u32 int_div, mantissa, fraction, oversampling;
- if (((u32)usart & STM32_BUS_MASK) == APB1_PERIPH_BASE)
- clock = clock_get(CLOCK_APB1);
- else if (((u32)usart & STM32_BUS_MASK) == APB2_PERIPH_BASE)
- clock = clock_get(CLOCK_APB2);
- else
- return -EINVAL;
-
- int_div = DIV_ROUND_CLOSEST(clock, baudrate);
+ int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
if (int_div < 16) {
oversampling = 8;
@@ -101,6 +94,12 @@ static int stm32_serial_probe(struct udevice *dev)
}
#endif
+ plat->clock_rate = clk_get_rate(&clk);
+ if (plat->clock_rate < 0) {
+ clk_disable(&clk);
+ return plat->clock_rate;
+ };
+
/* Disable usart-> disable overrun-> enable usart */
clrbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
setbits_le32(&usart->cr3, USART_CR3_OVRDIS);
diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h
index 42b05f14b5..9fe37af5cc 100644
--- a/drivers/serial/serial_stm32x7.h
+++ b/drivers/serial/serial_stm32x7.h
@@ -25,7 +25,7 @@ struct stm32_usart {
/* Information about a serial port */
struct stm32x7_serial_platdata {
struct stm32_usart *base; /* address of registers in physical memory */
- unsigned int clock;
+ unsigned long int clock_rate;
};
#define USART_CR1_OVER8 (1 << 15)