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-rw-r--r--arch/arm/cpu/armv7/socfpga/u-boot-spl.lds9
-rw-r--r--arch/arm/include/asm/arch-socfpga/spl.h15
-rw-r--r--arch/arm/include/asm/spl.h2
-rw-r--r--include/configs/socfpga_common.h17
4 files changed, 12 insertions, 31 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index db9bdad7d6..569fa418f4 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
@@ -42,13 +42,4 @@ SECTIONS
. = ALIGN(4);
__bss_end = .;
} >.sdram
-
- . = ALIGN(8);
- __malloc_start = .;
- . = . + CONFIG_SPL_MALLOC_SIZE;
- __malloc_end = .;
-
- . = . + CONFIG_SPL_STACK_SIZE;
- . = ALIGN(8);
- __stack_start = .;
}
diff --git a/arch/arm/include/asm/arch-socfpga/spl.h b/arch/arm/include/asm/arch-socfpga/spl.h
deleted file mode 100644
index 7e310d5a0c..0000000000
--- a/arch/arm/include/asm/arch-socfpga/spl.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2012 Pavel Machek <pavel@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SOCFPGA_SPL_H_
-#define _SOCFPGA_SPL_H_
-
-/* Symbols from linker script */
-extern char __malloc_start, __malloc_end, __stack_start;
-
-#define BOOT_DEVICE_RAM 1
-
-#endif
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index e5daf89127..8acd7cd1bd 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -7,7 +7,7 @@
#ifndef _ASM_SPL_H_
#define _ASM_SPL_H_
-#if defined(CONFIG_OMAP) || defined(CONFIG_SOCFPGA) \
+#if defined(CONFIG_OMAP) \
|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
|| defined(CONFIG_EXYNOS4210)
/* Platform-specific defines */
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 69527985e2..ef3572b73b 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -167,16 +167,21 @@
/*
* SPL
+ *
+ * SRAM Memory layout:
+ *
+ * 0xFFFF_0000 ...... Start of SRAM
+ * 0xFFFF_xxxx ...... Top of stack (grows down)
+ * 0xFFFF_yyyy ...... Malloc area
+ * 0xFFFF_zzzz ...... Global Data
+ * 0xFFFF_FF00 ...... End of SRAM
*/
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_RAM_DEVICE
-#define CONFIG_SPL_TEXT_BASE 0xFFFF0000
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SPL_STACK_SIZE (4 * 1024)
-#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) /* FIXME */
-#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start))
-#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start)
+#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
+#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024)
#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
#define CONFIG_CRC32_VERIFY