diff options
| -rw-r--r-- | arch/arm/Kconfig | 20 | ||||
| -rw-r--r-- | arch/arm/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/ste-dbx5x0-u-boot.dtsi | 29 | ||||
| -rw-r--r-- | arch/arm/include/asm/gpio.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-u8500/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/mach-u8500/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/mach-u8500/cache.c | 37 | ||||
| -rw-r--r-- | arch/arm/mach-u8500/cpuinfo.c | 25 |
8 files changed, 123 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a623ef5743..78cc79a235 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1009,6 +1009,24 @@ config ARCH_SUNXI imply SPL_SERIAL_SUPPORT imply USB_GADGET +config ARCH_U8500 + bool "ST-Ericsson U8500 Series" + select CPU_V7A + select DM + select DM_GPIO + select DM_MMC if MMC + select DM_SERIAL + select DM_USB if USB + select OF_CONTROL + select SYSRESET + select TIMER + imply ARM_PL180_MMCI + imply DM_RTC + imply NOMADIK_MTU_TIMER + imply PL01X_SERIAL + imply RTC_PL031 + imply SYSRESET_SYSCON + config ARCH_VERSAL bool "Support Xilinx Versal Platform" select ARM64 @@ -1779,6 +1797,8 @@ source "arch/arm/mach-sunxi/Kconfig" source "arch/arm/mach-tegra/Kconfig" +source "arch/arm/mach-u8500/Kconfig" + source "arch/arm/mach-uniphier/Kconfig" source "arch/arm/cpu/armv7/vf610/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1e60a9fdd4..e25bb0e594 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -79,6 +79,7 @@ machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_STM32) += stm32 machine-$(CONFIG_ARCH_STM32MP) += stm32mp machine-$(CONFIG_TEGRA) += tegra +machine-$(CONFIG_ARCH_U8500) += u8500 machine-$(CONFIG_ARCH_UNIPHIER) += uniphier machine-$(CONFIG_ARCH_ZYNQ) += zynq machine-$(CONFIG_ARCH_ZYNQMP) += zynqmp diff --git a/arch/arm/dts/ste-dbx5x0-u-boot.dtsi b/arch/arm/dts/ste-dbx5x0-u-boot.dtsi new file mode 100644 index 0000000000..4a99ee5a92 --- /dev/null +++ b/arch/arm/dts/ste-dbx5x0-u-boot.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "skeleton.dtsi" +#include "ste-dbx5x0.dtsi" + +/ { + soc { + /* FIXME: Remove this when clk driver is implemented */ + mtu@a03c6000 { + clock-frequency = <133000000>; + }; + uart@80120000 { + clock = <38400000>; + }; + uart@80121000 { + clock = <38400000>; + }; + uart@80007000 { + clock = <38400000>; + }; + }; + + reboot { + compatible = "syscon-reboot"; + regmap = <&prcmu>; + offset = <0x228>; /* PRCM_APE_SOFTRST */ + mask = <0x1>; + }; +}; diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 6ff5f42424..7203ccbaeb 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -3,7 +3,7 @@ !defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \ !defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1028A) && \ !defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \ - !defined(CONFIG_ARCH_ASPEED) + !defined(CONFIG_ARCH_ASPEED) && !defined(CONFIG_ARCH_U8500) #include <asm/arch/gpio.h> #endif #include <asm-generic/gpio.h> diff --git a/arch/arm/mach-u8500/Kconfig b/arch/arm/mach-u8500/Kconfig new file mode 100644 index 0000000000..3bc76295cb --- /dev/null +++ b/arch/arm/mach-u8500/Kconfig @@ -0,0 +1,6 @@ +if ARCH_U8500 + +config SYS_SOC + default "u8500" + +endif diff --git a/arch/arm/mach-u8500/Makefile b/arch/arm/mach-u8500/Makefile new file mode 100644 index 0000000000..0a53cbd9ac --- /dev/null +++ b/arch/arm/mach-u8500/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +obj-y += cache.o +obj-$(CONFIG_DISPLAY_CPUINFO) += cpuinfo.o diff --git a/arch/arm/mach-u8500/cache.c b/arch/arm/mach-u8500/cache.c new file mode 100644 index 0000000000..3d96d09f31 --- /dev/null +++ b/arch/arm/mach-u8500/cache.c @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net> + */ + +#include <common.h> +#include <cpu_func.h> +#include <asm/armv7.h> +#include <asm/pl310.h> + +#define PL310_WAY_MASK 0xff + +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif + +#ifdef CONFIG_SYS_L2_PL310 +void v7_outer_cache_disable(void) +{ + struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; + + /* + * Linux expects the L2 cache to be turned off by the bootloader. + * Otherwise, it fails very early (shortly after decompressing the kernel). + * + * On U8500, the L2 cache can be only turned on/off from the secure world. + * Instead, prevent usage of the L2 cache by locking all ways. + * The kernel needs to unlock them to make the L2 cache work again. + */ + writel(PL310_WAY_MASK, &pl310->pl310_lockdown_dbase); + writel(PL310_WAY_MASK, &pl310->pl310_lockdown_ibase); +} +#endif diff --git a/arch/arm/mach-u8500/cpuinfo.c b/arch/arm/mach-u8500/cpuinfo.c new file mode 100644 index 0000000000..20f5ff3398 --- /dev/null +++ b/arch/arm/mach-u8500/cpuinfo.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net> + */ + +#include <common.h> +#include <asm/io.h> + +#define U8500_BOOTROM_BASE 0x90000000 +#define U8500_ASIC_ID_LOC_V2 (U8500_BOOTROM_BASE + 0x1DBF4) + +int print_cpuinfo(void) +{ + /* Convert ASIC ID to display string, e.g. 0x8520A0 => DB8520 V1.0 */ + u32 asicid = readl(U8500_ASIC_ID_LOC_V2); + u32 cpu = (asicid >> 8) & 0xffff; + u32 rev = asicid & 0xff; + + /* 0xA0 => 0x10 (V1.0) */ + if (rev >= 0xa0) + rev -= 0x90; + + printf("CPU: ST-Ericsson DB%x V%d.%d\n", cpu, rev >> 4, rev & 0xf); + return 0; +} |