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-rw-r--r--arch/arm/include/asm/arch-rockchip/sdram_common.h16
-rw-r--r--drivers/ram/rockchip/sdram_rk3399.c30
2 files changed, 27 insertions, 19 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index b7549f5d8a..4749233226 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -71,21 +71,37 @@ struct sdram_base_params {
#define SYS_REG_NUM_CH_MASK 1
#define SYS_REG_ROW_3_4_SHIFT(ch) (30 + (ch))
#define SYS_REG_ROW_3_4_MASK 1
+#define SYS_REG_ENC_ROW_3_4(n, ch) ((n) << (30 + (ch)))
#define SYS_REG_CHINFO_SHIFT(ch) (28 + (ch))
+#define SYS_REG_ENC_CHINFO(ch) (1 << SYS_REG_CHINFO_SHIFT(ch))
+#define SYS_REG_ENC_DDRTYPE(n) ((n) << SYS_REG_DDRTYPE_SHIFT)
+#define SYS_REG_ENC_NUM_CH(n) (((n) - SYS_REG_NUM_CH_MASK) << \
+ SYS_REG_NUM_CH_SHIFT)
#define SYS_REG_RANK_SHIFT(ch) (11 + (ch) * 16)
#define SYS_REG_RANK_MASK 1
+#define SYS_REG_ENC_RANK(n, ch) (((n) - SYS_REG_RANK_MASK) << \
+ SYS_REG_RANK_SHIFT(ch))
#define SYS_REG_COL_SHIFT(ch) (9 + (ch) * 16)
#define SYS_REG_COL_MASK 3
+#define SYS_REG_ENC_COL(n, ch) (((n) - 9) << SYS_REG_COL_SHIFT(ch))
#define SYS_REG_BK_SHIFT(ch) (8 + (ch) * 16)
#define SYS_REG_BK_MASK 1
+#define SYS_REG_ENC_BK(n, ch) (((n) == 3 ? 0 : 1) << \
+ SYS_REG_BK_SHIFT(ch))
#define SYS_REG_CS0_ROW_SHIFT(ch) (6 + (ch) * 16)
#define SYS_REG_CS0_ROW_MASK 3
+#define SYS_REG_ENC_CS0_ROW(n, ch) (((n) - 13) << \
+ SYS_REG_CS0_ROW_SHIFT(ch))
#define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16)
#define SYS_REG_CS1_ROW_MASK 3
+#define SYS_REG_ENC_CS1_ROW(n, ch) (((n) - 13) << \
+ SYS_REG_CS1_ROW_SHIFT(ch))
#define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16)
#define SYS_REG_BW_MASK 3
+#define SYS_REG_ENC_BW(n, ch) ((2 >> (n)) << SYS_REG_BW_SHIFT(ch))
#define SYS_REG_DBW_SHIFT(ch) ((ch) * 16)
#define SYS_REG_DBW_MASK 3
+#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch))
/* Get sdram size decode from reg */
size_t rockchip_sdram_size(phys_addr_t reg);
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index c59c985c19..9bd163fa48 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1076,8 +1076,8 @@ static void dram_all_config(struct dram_info *dram,
u32 sys_reg = 0;
unsigned int channel, idx;
- sys_reg |= params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
- sys_reg |= (params->base.num_channels - 1) << SYS_REG_NUM_CH_SHIFT;
+ sys_reg |= SYS_REG_ENC_DDRTYPE(params->base.dramtype);
+ sys_reg |= SYS_REG_ENC_NUM_CH(params->base.num_channels);
for (channel = 0, idx = 0;
(idx < params->base.num_channels) && (channel < 2);
@@ -1089,23 +1089,15 @@ static void dram_all_config(struct dram_info *dram,
if (params->ch[channel].cap_info.col == 0)
continue;
idx++;
- sys_reg |= info->cap_info.row_3_4 <<
- SYS_REG_ROW_3_4_SHIFT(channel);
- sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(channel);
- sys_reg |= (info->cap_info.rank - 1) <<
- SYS_REG_RANK_SHIFT(channel);
- sys_reg |= (info->cap_info.col - 9) <<
- SYS_REG_COL_SHIFT(channel);
- sys_reg |= info->cap_info.bk == 3 ? 0 : 1 <<
- SYS_REG_BK_SHIFT(channel);
- sys_reg |= (info->cap_info.cs0_row - 13) <<
- SYS_REG_CS0_ROW_SHIFT(channel);
- sys_reg |= (info->cap_info.cs1_row - 13) <<
- SYS_REG_CS1_ROW_SHIFT(channel);
- sys_reg |= (2 >> info->cap_info.bw) <<
- SYS_REG_BW_SHIFT(channel);
- sys_reg |= (2 >> info->cap_info.dbw) <<
- SYS_REG_DBW_SHIFT(channel);
+ sys_reg |= SYS_REG_ENC_ROW_3_4(info->cap_info.row_3_4, channel);
+ sys_reg |= SYS_REG_ENC_CHINFO(channel);
+ sys_reg |= SYS_REG_ENC_RANK(info->cap_info.rank, channel);
+ sys_reg |= SYS_REG_ENC_COL(info->cap_info.col, channel);
+ sys_reg |= SYS_REG_ENC_BK(info->cap_info.bk, channel);
+ sys_reg |= SYS_REG_ENC_CS0_ROW(info->cap_info.cs0_row, channel);
+ sys_reg |= SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, channel);
+ sys_reg |= SYS_REG_ENC_BW(info->cap_info.bw, channel);
+ sys_reg |= SYS_REG_ENC_DBW(info->cap_info.dbw, channel);
ddr_msch_regs = dram->chan[channel].msch;
noc_timing = &params->ch[channel].noc_timings;