diff options
| -rw-r--r-- | CHANGELOG | 7 | ||||
| -rw-r--r-- | Makefile | 12 | ||||
| -rw-r--r-- | board/mpc8260ads/config.mk | 7 | ||||
| -rw-r--r-- | cpu/mpc8260/start.S | 4 | ||||
| -rw-r--r-- | include/configs/MPC8260ADS.h | 23 |
5 files changed, 48 insertions, 5 deletions
@@ -2,6 +2,13 @@ Changes for U-Boot 1.1.3: ====================================================================== +* Patch by Jerry Van Baren, 08 Nov 2004: + - Add low-boot option for MPC8260ADS board (if lowboot is selected, + the jumper for the HRCW source should select flash. If lowboot is + not selected, the jumper for the HRCW source should select the + BCSR. + - change default load base address to 0x00400000 + * Patch by Yuli Barcohen, 08 Nov 2004: Add support for Analogue & Micro Rattler boards. Tested on Rattler8248. @@ -992,13 +992,21 @@ ISPAN_REVB_config: unconfig @./mkconfig -a ISPAN ppc mpc8260 ispan MPC8260ADS_config \ +MPC8260ADS_lowboot_config \ MPC8260ADS_33MHz_config \ +MPC8260ADS_33MHz_lowboot_config \ MPC8260ADS_40MHz_config \ +MPC8260ADS_40MHz_lowboot_config \ MPC8272ADS_config \ +MPC8272ADS_lowboot_config \ PQ2FADS_config \ +PQ2FADS_lowboot_config \ PQ2FADS-VR_config \ +PQ2FADS-VR_lowboot_config \ PQ2FADS-ZU_config \ +PQ2FADS-ZU_lowboot_config \ PQ2FADS-ZU_66MHz_config \ +PQ2FADS-ZU_66MHz_lowboot_config \ : unconfig $(if $(findstring PQ2FADS,$@), \ @echo "#define CONFIG_ADSTYPE CFG_PQ2FADS" > include/config.h, \ @@ -1007,6 +1015,10 @@ PQ2FADS-ZU_66MHz_config \ @echo "#define CONFIG_8260_CLKIN" $(subst MHz,,$(word 2,$(subst _, ,$@)))"000000" >> include/config.h, \ $(if $(findstring VR,$@), \ @echo "#define CONFIG_8260_CLKIN 66000000" >> include/config.h)) + @[ -z "$(findstring lowboot_,$@)" ] || \ + { echo "TEXT_BASE = 0xFF800000" >board/mpc8260ads/config.tmp ; \ + echo "... with lowboot configuration" ; \ + } @./mkconfig -a MPC8260ADS ppc mpc8260 mpc8260ads MPC8266ADS_config: unconfig diff --git a/board/mpc8260ads/config.mk b/board/mpc8260ads/config.mk index 3dca6da939..eb6f7c9d1f 100644 --- a/board/mpc8260ads/config.mk +++ b/board/mpc8260ads/config.mk @@ -29,4 +29,9 @@ # MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards # -TEXT_BASE = 0xfff00000 +sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp + +ifndef TEXT_BASE +## Standard: boot high +TEXT_BASE = 0xFFF00000 +endif diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S index a499bc1e9d..2e93bbbb86 100644 --- a/cpu/mpc8260/start.S +++ b/cpu/mpc8260/start.S @@ -172,7 +172,7 @@ _start_warm: b boot_warm boot_cold: -#if defined(CONFIG_MPC8260ADS) +#if defined(CONFIG_MPC8260ADS) && defined(CFG_DEFAULT_IMMR) lis r3, CFG_DEFAULT_IMMR@h nop lwz r4, 0(r3) @@ -183,7 +183,7 @@ boot_cold: nop stw r4, 0(r3) nop -#endif /* CONFIG_MPC8260ADS */ +#endif /* CONFIG_MPC8260ADS && CFG_DEFAULT_IMMR */ boot_warm: mfmsr r5 /* save msr contents */ diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index 6eec253b51..ed8fe6b075 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -42,6 +42,14 @@ #define CONFIG_MPC8260ADS 1 /* Motorola PQ2 ADS family board */ +/* + * Figure out if we are booting low via flash HRCW or high via the BCSR. + */ +#if (TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */ +# define CFG_LOWBOOT 1 +#endif + + /* ADS flavours */ #define CFG_8260ADS 1 /* MPC8260ADS */ #define CFG_8266ADS 2 /* MPC8266ADS */ @@ -252,7 +260,7 @@ #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ -#define CFG_LOAD_ADDR 0x100000 /* default load address */ +#define CFG_LOAD_ADDR 0x400000 /* default load address */ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ @@ -274,7 +282,9 @@ #define CFG_JFFS_CUSTOM_PART /* this is stuff came out of the Motorola docs */ +#ifndef CFG_LOWBOOT #define CFG_DEFAULT_IMMR 0x0F010000 +#endif #define CFG_IMMR 0xF0000000 #define CFG_BCSR 0xF4500000 @@ -296,12 +306,21 @@ #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -/* 0x0EA28205 */ +#ifdef CFG_LOWBOOT +/* PQ2FADS flash HRCW = 0x0EB4B645 */ +#define CFG_HRCW_MASTER ( ( HRCW_BPS11 | HRCW_CIP ) |\ + ( HRCW_L2CPC10 | HRCW_DPPC11 | HRCW_ISB100 ) |\ + ( HRCW_BMS | HRCW_MMR11 | HRCW_LBPC01 | HRCW_APPC10 ) |\ + ( HRCW_CS10PC01 | HRCW_MODCK_H0101 ) \ + ) +#else +/* PQ2FADS BCSR HRCW = 0x0CB23645 */ #define CFG_HRCW_MASTER ( ( HRCW_BPS11 | HRCW_CIP ) |\ ( HRCW_L2CPC10 | HRCW_DPPC10 | HRCW_ISB010 ) |\ ( HRCW_BMS | HRCW_APPC10 ) |\ ( HRCW_MODCK_H0101 ) \ ) +#endif /* no slaves */ #define CFG_HRCW_SLAVE1 0 #define CFG_HRCW_SLAVE2 0 |