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-rw-r--r--cpu/ppc4xx/4xx_pcie.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c
index 2bc9638f41..177e2ad2e7 100644
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@@ -431,6 +431,12 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
{
u32 val;
+ /*
+ * test-only:
+ * This needs some testing and perhaps changes for
+ * endpoint configuration. Probably no PHY reset at all, etc.
+ * sr, 2007-10-03
+ */
if (rootport)
val = 0x00401000;
else