diff options
40 files changed, 878 insertions, 207 deletions
diff --git a/.travis.yml b/.travis.yml index 937f028d6d..7e90bc9b36 100644 --- a/.travis.yml +++ b/.travis.yml @@ -87,9 +87,9 @@ before_script: fi - if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi - if [[ "${TOOLCHAIN}" == "riscv" ]]; then - wget https://github.com/PkmX/riscv-prebuilt-toolchains/releases/download/20180111/riscv32-unknown-elf-toolchain.tar.gz && - tar -C /tmp -xf riscv32-unknown-elf-toolchain.tar.gz && - echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv32-unknown-elf/bin/riscv32-unknown-elf-" >> ~/.buildman; + wget https://github.com/andestech/prebuilt/releases/download/20180530/riscv64-unknown-linux-gnu.tar.gz && + tar -C /tmp -xf riscv64-unknown-linux-gnu.tar.gz && + echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-" >> ~/.buildman; fi - if [[ "${QEMU_TARGET}" != "" ]]; then git clone git://git.qemu.org/qemu.git /tmp/qemu; diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c50be37c97..20a43d88e3 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -8,12 +8,12 @@ choice prompt "Target select" optional -config TARGET_NX25_AE250 - bool "Support nx25-ae250" +config TARGET_AX25_AE350 + bool "Support ax25-ae350" endchoice -source "board/AndesTech/nx25-ae250/Kconfig" +source "board/AndesTech/ax25-ae350/Kconfig" choice prompt "CPU selection" diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk index a7448e2095..219e66683d 100644 --- a/arch/riscv/config.mk +++ b/arch/riscv/config.mk @@ -19,15 +19,20 @@ endif ifdef CONFIG_32BIT PLATFORM_LDFLAGS += -m $(32bit-emul) +EFI_LDS := elf_riscv32_efi.lds endif ifdef CONFIG_64BIT PLATFORM_LDFLAGS += -m $(64bit-emul) +EFI_LDS := elf_riscv64_efi.lds endif CONFIG_STANDALONE_LOAD_ADDR = 0x00000000 \ -T $(srctree)/examples/standalone/riscv.lds PLATFORM_CPPFLAGS += -ffixed-gp -fpic -PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2 +PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2 -ffunction-sections LDFLAGS_u-boot += --gc-sections -static -pie + +EFI_CRT0 := crt0_riscv_efi.o +EFI_RELOC := reloc_riscv_efi.o diff --git a/arch/riscv/cpu/nx25/Makefile b/arch/riscv/cpu/ax25/Makefile index c3f164c122..c3f164c122 100644 --- a/arch/riscv/cpu/nx25/Makefile +++ b/arch/riscv/cpu/ax25/Makefile diff --git a/arch/riscv/cpu/nx25/cpu.c b/arch/riscv/cpu/ax25/cpu.c index 091e9ef59e..ab05b57d4f 100644 --- a/arch/riscv/cpu/nx25/cpu.c +++ b/arch/riscv/cpu/ax25/cpu.c @@ -28,5 +28,5 @@ int cleanup_before_linux(void) int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { disable_interrupts(); - panic("nx25-ae250 wdt not support yet.\n"); + panic("ax25-ae350 wdt not support yet.\n"); } diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/ax25/start.S index 7cd7755190..7cd7755190 100644 --- a/arch/riscv/cpu/nx25/start.S +++ b/arch/riscv/cpu/ax25/start.S diff --git a/arch/riscv/cpu/nx25/u-boot.lds b/arch/riscv/cpu/ax25/u-boot.lds index 86ebc9f4bb..1589babf6c 100644 --- a/arch/riscv/cpu/nx25/u-boot.lds +++ b/arch/riscv/cpu/ax25/u-boot.lds @@ -11,7 +11,7 @@ SECTIONS . = ALIGN(4); .text : { - arch/riscv/cpu/nx25/start.o (.text) + arch/riscv/cpu/ax25/start.o (.text) *(.text) } @@ -39,6 +39,22 @@ SECTIONS . = ALIGN(4); + .efi_runtime : { + __efi_runtime_start = .; + *(efi_runtime_text) + *(efi_runtime_data) + __efi_runtime_stop = .; + } + + .efi_runtime_rel : { + __efi_runtime_rel_start = .; + *(.relaefi_runtime_text) + *(.relaefi_runtime_data) + __efi_runtime_rel_stop = .; + } + + . = ALIGN(4); + /DISCARD/ : { *(.rela.plt*) } .rela.dyn : { __rel_dyn_start = .; diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 793677524a..a1b06ffc6f 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ -dtb-$(CONFIG_TARGET_NX25_AE250) += ae250.dtb +dtb-$(CONFIG_TARGET_AX25_AE350) += ae350.dtb targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/riscv/dts/ae250.dts b/arch/riscv/dts/ae250.dts deleted file mode 100644 index 9a38345e36..0000000000 --- a/arch/riscv/dts/ae250.dts +++ /dev/null @@ -1,97 +0,0 @@ -/dts-v1/; -/ { - compatible = "riscv32 nx25"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - aliases { - uart0 = &serial0; - ethernet0 = &mac0; - spi0 = &spi; - } ; - - chosen { - bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; - stdout-path = "uart0:38400n8"; - tick-timer = &timer0; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x40000000>; - }; - - spiclk: virt_100mhz { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu@0 { - compatible = "andestech,n13"; - reg = <0>; - /* FIXME: to fill correct frqeuency */ - clock-frequency = <60000000>; - }; - }; - - intc: interrupt-controller { - compatible = "andestech,atnointc010"; - #interrupt-cells = <1>; - interrupt-controller; - }; - - serial0: serial@f0300000 { - compatible = "andestech,uart16550", "ns16550a"; - reg = <0xf0300000 0x1000>; - interrupts = <7 4>; - clock-frequency = <19660800>; - reg-shift = <2>; - reg-offset = <32>; - no-loopback-test = <1>; - }; - - timer0: timer@f0400000 { - compatible = "andestech,atcpit100"; - reg = <0xf0400000 0x1000>; - interrupts = <2 4>; - clock-frequency = <40000000>; - }; - - mac0: mac@e0100000 { - compatible = "andestech,atmac100"; - reg = <0xe0100000 0x1000>; - interrupts = <25 4>; - }; - - mmc0: mmc@f0e00000 { - compatible = "andestech,atsdc010"; - max-frequency = <100000000>; - fifo-depth = <0x10>; - reg = <0xf0e00000 0x1000>; - interrupts = <17 4>; - cap-sd-highspeed; - }; - - spi: spi@f0b00000 { - compatible = "andestech,atcspi200"; - reg = <0xf0b00000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <1>; - clocks = <&spiclk>; - interrupts = <3 4>; - flash@0 { - compatible = "spi-flash"; - spi-max-frequency = <50000000>; - reg = <0>; - spi-cpol; - spi-cpha; - }; - }; - -}; diff --git a/arch/riscv/dts/ae350.dts b/arch/riscv/dts/ae350.dts new file mode 100644 index 0000000000..2927e4151b --- /dev/null +++ b/arch/riscv/dts/ae350.dts @@ -0,0 +1,149 @@ +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "andestech,ax25"; + model = "andestech,ax25"; + + aliases { + uart0 = &serial0; + spi0 = &spi; + } ; + + chosen { + bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; + stdout-path = "uart0:38400n8"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <10000000>; + CPU0: cpu@0 { + device_type = "cpu"; + reg = <0>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv39"; + clock-frequency = <60000000>; + CPU0_intc: interrupt-controller { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x00000000 0x0 0x40000000>; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "andestech,riscv-ae350-soc"; + ranges; + }; + + plmt0@e6000000 { + compatible = "riscv,plmt0"; + interrupts-extended = <&CPU0_intc 7>; + reg = <0x0 0xe6000000 0x0 0x100000>; + }; + + plic0: interrupt-controller@e4000000 { + compatible = "riscv,plic0"; + #address-cells = <2>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x0 0xe4000000 0x0 0x2000000>; + riscv,ndev=<31>; + interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>; + }; + + plic1: interrupt-controller@e6400000 { + compatible = "riscv,plic1"; + #address-cells = <2>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x0 0xe6400000 0x0 0x400000>; + riscv,ndev=<1>; + interrupts-extended = <&CPU0_intc 3>; + }; + + spiclk: virt_100mhz { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + + timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0x0 0xf0400000 0x0 0x1000>; + clock-frequency = <40000000>; + interrupts = <3 4>; + interrupt-parent = <&plic0>; + }; + + serial0: serial@f0300000 { + compatible = "andestech,uart16550", "ns16550a"; + reg = <0x0 0xf0300000 0x0 0x1000>; + interrupts = <9 4>; + clock-frequency = <19660800>; + reg-shift = <2>; + reg-offset = <32>; + no-loopback-test = <1>; + interrupt-parent = <&plic0>; + }; + + mac0: mac@e0100000 { + compatible = "andestech,atmac100"; + reg = <0x0 0xe0100000 0x0 0x1000>; + interrupts = <19 4>; + interrupt-parent = <&plic0>; + }; + + mmc0: mmc@f0e00000 { + compatible = "andestech,atfsdc010"; + max-frequency = <100000000>; + clock-freq-min-max = <400000 100000000>; + fifo-depth = <0x10>; + reg = <0x0 0xf0e00000 0x0 0x1000>; + interrupts = <18 4>; + cap-sd-highspeed; + interrupt-parent = <&plic0>; + }; + + smc0: smc@e0400000 { + compatible = "andestech,atfsmc020"; + reg = <0x0 0xe0400000 0x0 0x1000>; + }; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0x0 0x88000000 0x0 0x1000>; + bank-width = <2>; + device-width = <1>; + }; + + spi: spi@f0b00000 { + compatible = "andestech,atcspi200"; + reg = <0x0 0xf0b00000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <1>; + clocks = <&spiclk>; + interrupts = <3 4>; + interrupt-parent = <&plic0>; + flash@0 { + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + spi-cpol; + spi-cpha; + }; + }; +}; diff --git a/arch/riscv/include/asm/mach-types.h b/arch/riscv/include/asm/mach-types.h index 93afff70b3..f219cedfd3 100644 --- a/arch/riscv/include/asm/mach-types.h +++ b/arch/riscv/include/asm/mach-types.h @@ -12,18 +12,18 @@ extern unsigned int __machine_arch_type; #endif -#define MACH_TYPE_AE250 1 +#define MACH_TYPE_AE350 1 -#ifdef CONFIG_ARCH_AE250 +#ifdef CONFIG_ARCH_AE350 # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_AE250 +# define machine_arch_type MACH_TYPE_AE350 # endif -# define machine_is_ae250() (machine_arch_type == MACH_TYPE_AE250) +# define machine_is_ae350() (machine_arch_type == MACH_TYPE_AE350) #else -# define machine_is_ae250() (1) +# define machine_is_ae350() (1) #endif #endif /* __ASM_RISCV_MACH_TYPE_H */ diff --git a/arch/riscv/include/asm/setjmp.h b/arch/riscv/include/asm/setjmp.h new file mode 100644 index 0000000000..72383d4330 --- /dev/null +++ b/arch/riscv/include/asm/setjmp.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 Alexander Graf <agraf@suse.de> + */ + +#ifndef _SETJMP_H_ +#define _SETJMP_H_ 1 + +/* + * This really should be opaque, but the EFI implementation wrongly + * assumes that a 'struct jmp_buf_data' is defined. + */ +struct jmp_buf_data { + /* x2, x8, x9, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, sp */ + unsigned long s_regs[12]; /* s0 - s11 */ + unsigned long ra; + unsigned long sp; +}; + +typedef struct jmp_buf_data jmp_buf[1]; + +int setjmp(jmp_buf jmp); +void longjmp(jmp_buf jmp, int ret); + +#endif /* _SETJMP_H_ */ diff --git a/arch/riscv/include/asm/u-boot-riscv.h b/arch/riscv/include/asm/u-boot-riscv.h index c4c068f9e2..49febd5881 100644 --- a/arch/riscv/include/asm/u-boot-riscv.h +++ b/arch/riscv/include/asm/u-boot-riscv.h @@ -16,5 +16,6 @@ int cleanup_before_linux(void); /* board/.../... */ int board_init(void); +void board_quiesce_devices(void); #endif /* _U_BOOT_RISCV_H_ */ diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 0b671f7086..cc562f935a 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -10,3 +10,15 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-y += interrupts.o +obj-y += setjmp.o + +# For building EFI apps +CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI) +CFLAGS_REMOVE_$(EFI_CRT0) := $(CFLAGS_NON_EFI) + +CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI) +CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI) + +extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC) +extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC) +extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c index 8ede0485d4..2610a57bbf 100644 --- a/arch/riscv/lib/bootm.c +++ b/arch/riscv/lib/bootm.c @@ -15,6 +15,10 @@ DECLARE_GLOBAL_DATA_PTR; +__weak void board_quiesce_devices(void) +{ +} + int arch_fixup_fdt(void *blob) { return 0; diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S new file mode 100644 index 0000000000..18f61f515a --- /dev/null +++ b/arch/riscv/lib/crt0_riscv_efi.S @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * crt0-efi-riscv.S - PE/COFF header for RISC-V EFI applications + * + * Copright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> + * Copright (C) 2018 Alexander Graf <agraf@suse.de> + * + * This file is inspired by arch/arm/lib/crt0_aarch64_efi.S + */ + +#include <asm-generic/pe.h> + +#if __riscv_xlen == 64 +#define SIZE_LONG 8 +#define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp) +#define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp) +#define PE_MACHINE 0x5064 +#else +#define SIZE_LONG 4 +#define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp) +#define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp) +#define PE_MACHINE 0x5032 +#endif + + + .section .text.head + + /* + * Magic "MZ" signature for PE/COFF + */ + .globl ImageBase +ImageBase: + .ascii "MZ" + .skip 58 /* 'MZ' + pad + offset == 64 */ + .long pe_header - ImageBase /* Offset to the PE header */ +pe_header: + .ascii "PE" + .short 0 +coff_header: + .short PE_MACHINE /* RISC-V 64/32-bit */ + .short 2 /* nr_sections */ + .long 0 /* TimeDateStamp */ + .long 0 /* PointerToSymbolTable */ + .long 1 /* NumberOfSymbols */ + .short section_table - optional_header /* SizeOfOptionalHeader */ + /* + * Characteristics: IMAGE_FILE_DEBUG_STRIPPED | + * IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_LINE_NUMS_STRIPPED + */ + .short 0x206 +optional_header: + .short 0x20b /* PE32+ format */ + .byte 0x02 /* MajorLinkerVersion */ + .byte 0x14 /* MinorLinkerVersion */ + .long _edata - _start /* SizeOfCode */ + .long 0 /* SizeOfInitializedData */ + .long 0 /* SizeOfUninitializedData */ + .long _start - ImageBase /* AddressOfEntryPoint */ + .long _start - ImageBase /* BaseOfCode */ + +extra_header_fields: + .quad 0 /* ImageBase */ + .long 0x20 /* SectionAlignment */ + .long 0x8 /* FileAlignment */ + .short 0 /* MajorOperatingSystemVersion */ + .short 0 /* MinorOperatingSystemVersion */ + .short 0 /* MajorImageVersion */ + .short 0 /* MinorImageVersion */ + .short 0 /* MajorSubsystemVersion */ + .short 0 /* MinorSubsystemVersion */ + .long 0 /* Win32VersionValue */ + + .long _edata - ImageBase /* SizeOfImage */ + + /* + * Everything before the kernel image is considered part of the header + */ + .long _start - ImageBase /* SizeOfHeaders */ + .long 0 /* CheckSum */ + .short IMAGE_SUBSYSTEM_EFI_APPLICATION /* Subsystem */ + .short 0 /* DllCharacteristics */ + .quad 0 /* SizeOfStackReserve */ + .quad 0 /* SizeOfStackCommit */ + .quad 0 /* SizeOfHeapReserve */ + .quad 0 /* SizeOfHeapCommit */ + .long 0 /* LoaderFlags */ + .long 0x6 /* NumberOfRvaAndSizes */ + + .quad 0 /* ExportTable */ + .quad 0 /* ImportTable */ + .quad 0 /* ResourceTable */ + .quad 0 /* ExceptionTable */ + .quad 0 /* CertificationTable */ + .quad 0 /* BaseRelocationTable */ + + /* Section table */ +section_table: + + /* + * The EFI application loader requires a relocation section + * because EFI applications must be relocatable. This is a + * dummy section as far as we are concerned. + */ + .ascii ".reloc" + .byte 0 + .byte 0 /* end of 0 padding of section name */ + .long 0 + .long 0 + .long 0 /* SizeOfRawData */ + .long 0 /* PointerToRawData */ + .long 0 /* PointerToRelocations */ + .long 0 /* PointerToLineNumbers */ + .short 0 /* NumberOfRelocations */ + .short 0 /* NumberOfLineNumbers */ + .long 0x42100040 /* Characteristics (section flags) */ + + + .ascii ".text" + .byte 0 + .byte 0 + .byte 0 /* end of 0 padding of section name */ + .long _edata - _start /* VirtualSize */ + .long _start - ImageBase /* VirtualAddress */ + .long _edata - _start /* SizeOfRawData */ + .long _start - ImageBase /* PointerToRawData */ + + .long 0 /* PointerToRelocations (0 for executables) */ + .long 0 /* PointerToLineNumbers (0 for executables) */ + .short 0 /* NumberOfRelocations (0 for executables) */ + .short 0 /* NumberOfLineNumbers (0 for executables) */ + .long 0xe0500020 /* Characteristics (section flags) */ + +_start: + addi sp, sp, -(SIZE_LONG * 3) + SAVE_LONG(a0, 0) + SAVE_LONG(a1, 1) + SAVE_LONG(ra, 2) + + lla a0, ImageBase + lla a1, _DYNAMIC + call _relocate + bne a0, zero, 0f + + LOAD_LONG(a1, 1) + LOAD_LONG(a0, 0) + call efi_main + + LOAD_LONG(ra, 2) + +0: addi sp, sp, (SIZE_LONG * 3) + ret diff --git a/arch/riscv/lib/elf_riscv32_efi.lds b/arch/riscv/lib/elf_riscv32_efi.lds new file mode 100644 index 0000000000..629705fc28 --- /dev/null +++ b/arch/riscv/lib/elf_riscv32_efi.lds @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * U-Boot riscv32 EFI linker script + * + * SPDX-License-Identifier: BSD-2-Clause + * + * Modified from arch/arm/lib/elf_aarch64_efi.lds + */ + +OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv") +OUTPUT_ARCH(riscv) +ENTRY(_start) +SECTIONS +{ + .text 0x0 : { + _text = .; + *(.text.head) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.srodata) + *(.rodata*) + . = ALIGN(16); + } + _etext = .; + _text_size = . - _text; + .dynamic : { *(.dynamic) } + .data : { + _data = .; + *(.sdata) + *(.data) + *(.data1) + *(.data.*) + *(.got.plt) + *(.got) + + /* + * The EFI loader doesn't seem to like a .bss section, so we + * stick it all into .data: + */ + . = ALIGN(16); + _bss = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(16); + _bss_end = .; + _edata = .; + } + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + .rela.got : { *(.rela.got) } + .rela.data : { *(.rela.data) *(.rela.data*) } + _data_size = . - _etext; + + . = ALIGN(4096); + .dynsym : { *(.dynsym) } + . = ALIGN(4096); + .dynstr : { *(.dynstr) } + . = ALIGN(4096); + .note.gnu.build-id : { *(.note.gnu.build-id) } + /DISCARD/ : { + *(.rel.reloc) + *(.eh_frame) + *(.note.GNU-stack) + } + .comment 0 : { *(.comment) } +} diff --git a/arch/riscv/lib/elf_riscv64_efi.lds b/arch/riscv/lib/elf_riscv64_efi.lds new file mode 100644 index 0000000000..aece030c37 --- /dev/null +++ b/arch/riscv/lib/elf_riscv64_efi.lds @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * U-Boot riscv64 EFI linker script + * + * SPDX-License-Identifier: BSD-2-Clause + * + * Modified from arch/arm/lib/elf_aarch64_efi.lds + */ + +OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv") +OUTPUT_ARCH(riscv) +ENTRY(_start) +SECTIONS +{ + .text 0x0 : { + _text = .; + *(.text.head) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.srodata) + *(.rodata*) + . = ALIGN(16); + } + _etext = .; + _text_size = . - _text; + .dynamic : { *(.dynamic) } + .data : { + _data = .; + *(.sdata) + *(.data) + *(.data1) + *(.data.*) + *(.got.plt) + *(.got) + + /* + * The EFI loader doesn't seem to like a .bss section, so we + * stick it all into .data: + */ + . = ALIGN(16); + _bss = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(16); + _bss_end = .; + _edata = .; + } + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + .rela.got : { *(.rela.got) } + .rela.data : { *(.rela.data) *(.rela.data*) } + _data_size = . - _etext; + + . = ALIGN(4096); + .dynsym : { *(.dynsym) } + . = ALIGN(4096); + .dynstr : { *(.dynstr) } + . = ALIGN(4096); + .note.gnu.build-id : { *(.note.gnu.build-id) } + /DISCARD/ : { + *(.rel.reloc) + *(.eh_frame) + *(.note.GNU-stack) + } + .comment 0 : { *(.comment) } +} diff --git a/arch/riscv/lib/reloc_riscv_efi.c b/arch/riscv/lib/reloc_riscv_efi.c new file mode 100644 index 0000000000..8b4b2b1d8f --- /dev/null +++ b/arch/riscv/lib/reloc_riscv_efi.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* reloc_riscv.c - position independent ELF shared object relocator + Copyright (C) 2018 Alexander Graf <agraf@suse.de> + Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> + Copyright (C) 1999 Hewlett-Packard Co. + Contributed by David Mosberger <davidm@hpl.hp.com>. + + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above + copyright notice, this list of conditions and the following + disclaimer in the documentation and/or other materials + provided with the distribution. + * Neither the name of Hewlett-Packard Co. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + BE LIABLE FOR ANYDIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + SUCH DAMAGE. +*/ + +#include <efi.h> + +#include <elf.h> + +#if __riscv_xlen == 64 +#define Elf_Dyn Elf64_Dyn +#define Elf_Rela Elf64_Rela +#define ELF_R_TYPE ELF64_R_TYPE +#else +#define Elf_Dyn Elf32_Dyn +#define Elf_Rela Elf32_Rela +#define ELF_R_TYPE ELF32_R_TYPE +#endif + +efi_status_t _relocate(long ldbase, Elf_Dyn *dyn, efi_handle_t image, + struct efi_system_table *systab) +{ + long relsz = 0, relent = 0; + Elf_Rela *rel = 0; + unsigned long *addr; + int i; + + for (i = 0; dyn[i].d_tag != DT_NULL; ++i) { + switch (dyn[i].d_tag) { + case DT_RELA: + rel = (Elf_Rela *)((ulong)dyn[i].d_un.d_ptr + ldbase); + break; + case DT_RELASZ: + relsz = dyn[i].d_un.d_val; + break; + case DT_RELAENT: + relent = dyn[i].d_un.d_val; + break; + default: + break; + } + } + + if (!rel && relent == 0) + return EFI_SUCCESS; + + if (!rel || relent == 0) + return EFI_LOAD_ERROR; + + while (relsz > 0) { + /* apply the relocs */ + switch (ELF_R_TYPE(rel->r_info)) { + case R_RISCV_RELATIVE: + addr = (ulong *)(ldbase + rel->r_offset); + *addr = ldbase + rel->r_addend; + break; + default: + /* Panic */ + while (1) ; + } + rel = (Elf_Rela *)((char *)rel + relent); + relsz -= relent; + } + return EFI_SUCCESS; +} diff --git a/arch/riscv/lib/setjmp.S b/arch/riscv/lib/setjmp.S new file mode 100644 index 0000000000..8f5a6a23aa --- /dev/null +++ b/arch/riscv/lib/setjmp.S @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) 2018 Alexander Graf <agraf@suse.de> + */ + +#include <config.h> +#include <linux/linkage.h> + +#ifdef CONFIG_CPU_RISCV_64 +#define STORE_IDX(reg, idx) sd reg, (idx*8)(a0) +#define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0) +#else +#define STORE_IDX(reg, idx) sw reg, (idx*4)(a0) +#define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0) +#endif + +.pushsection .text.setjmp, "ax" +ENTRY(setjmp) + /* Preserve all callee-saved registers and the SP */ + STORE_IDX(s0, 0) + STORE_IDX(s1, 1) + STORE_IDX(s2, 2) + STORE_IDX(s3, 3) + STORE_IDX(s4, 4) + STORE_IDX(s5, 5) + STORE_IDX(s6, 6) + STORE_IDX(s7, 7) + STORE_IDX(s8, 8) + STORE_IDX(s9, 9) + STORE_IDX(s10, 10) + STORE_IDX(s11, 11) + STORE_IDX(ra, 12) + STORE_IDX(sp, 13) + li a0, 0 + ret +ENDPROC(setjmp) +.popsection + +.pushsection .text.longjmp, "ax" +ENTRY(longjmp) + LOAD_IDX(s0, 0) + LOAD_IDX(s1, 1) + LOAD_IDX(s2, 2) + LOAD_IDX(s3, 3) + LOAD_IDX(s4, 4) + LOAD_IDX(s5, 5) + LOAD_IDX(s6, 6) + LOAD_IDX(s7, 7) + LOAD_IDX(s8, 8) + LOAD_IDX(s9, 9) + LOAD_IDX(s10, 10) + LOAD_IDX(s11, 11) + LOAD_IDX(ra, 12) + LOAD_IDX(sp, 13) + + /* Move the return value in place, but return 1 if passed 0. */ + beq a1, zero, longjmp_1 + mv a0, a1 + ret + + longjmp_1: + li a0, 1 + ret +ENDPROC(longjmp) +.popsection diff --git a/board/AndesTech/nx25-ae250/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 2fb3234bad..bb69ea3489 100644 --- a/board/AndesTech/nx25-ae250/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -1,19 +1,19 @@ -if TARGET_NX25_AE250 +if TARGET_AX25_AE350 config SYS_CPU - default "nx25" + default "ax25" config SYS_BOARD - default "nx25-ae250" + default "ax25-ae350" config SYS_VENDOR default "AndesTech" config SYS_SOC - default "ae250" + default "ae350" config SYS_CONFIG_NAME - default "nx25-ae250" + default "ax25-ae350" config ENV_SIZE default 0x2000 if ENV_IS_IN_SPI_FLASH diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS new file mode 100644 index 0000000000..508c6ace72 --- /dev/null +++ b/board/AndesTech/ax25-ae350/MAINTAINERS @@ -0,0 +1,6 @@ +AX25-AE350 BOARD +M: Rick Chen <rick@andestech.com> +S: Maintained +F: board/AndesTech/ax25-ae350/ +F: include/configs/ax25-ae350.h +F: configs/ax25-ae350_defconfig diff --git a/board/AndesTech/nx25-ae250/Makefile b/board/AndesTech/ax25-ae350/Makefile index e30b2d3c27..0e4ba8d702 100644 --- a/board/AndesTech/nx25-ae250/Makefile +++ b/board/AndesTech/ax25-ae350/Makefile @@ -3,4 +3,4 @@ # Copyright (C) 2017 Andes Technology Corporation. # Rick Chen, Andes Technology Corporation <rick@andestech.com> -obj-y := nx25-ae250.o +obj-y := ax25-ae350.o diff --git a/board/AndesTech/nx25-ae250/nx25-ae250.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 4bb618b32c..fd5aaa1579 100644 --- a/board/AndesTech/nx25-ae250/nx25-ae250.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -10,6 +10,8 @@ #include <netdev.h> #endif #include <linux/io.h> +#include <faraday/ftsmc020.h> +#include <fdtdec.h> DECLARE_GLOBAL_DATA_PTR; @@ -19,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_AE250; + gd->bd->bi_arch_number = MACH_TYPE_AE350; gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; return 0; @@ -72,3 +74,35 @@ void *board_fdt_blob_setup(void) return (void *)CONFIG_SYS_FDT_BASE; } + +int smc_init(void) +{ + int node = -1; + const char *compat = "andestech,atfsmc020"; + void *blob = (void *)gd->fdt_blob; + fdt_addr_t addr; + struct ftsmc020_bank *regs; + + node = fdt_node_offset_by_compatible(blob, -1, compat); + if (node < 0) + return -FDT_ERR_NOTFOUND; + + addr = fdtdec_get_addr(blob, node, "reg"); + + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + regs = (struct ftsmc020_bank *)addr; + regs->cr &= ~FTSMC020_BANK_WPROT; + + return 0; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ + smc_init(); + + return 0; +} +#endif diff --git a/board/AndesTech/nx25-ae250/MAINTAINERS b/board/AndesTech/nx25-ae250/MAINTAINERS deleted file mode 100644 index 1bff127c64..0000000000 --- a/board/AndesTech/nx25-ae250/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -NX25-AE250 BOARD -M: Rick Chen <rick@andestech.com> -S: Maintained -F: board/AndesTech/nx25-ae250/ -F: include/configs/nx25-ae250.h -F: configs/nx25-ae250_defconfig diff --git a/cmd/Kconfig b/cmd/Kconfig index d532c9fc41..1a1ca60237 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -228,7 +228,7 @@ config CMD_BOOTEFI config CMD_BOOTEFI_HELLO_COMPILE bool "Compile a standard EFI hello world binary for testing" - depends on CMD_BOOTEFI && (ARM || X86) + depends on CMD_BOOTEFI && (ARM || X86 || RISCV) default y help This compiles a standard EFI hello world application with U-Boot so diff --git a/configs/nx25-ae250_defconfig b/configs/ax25-ae350_defconfig index 42507755a6..5a69eb50c5 100644 --- a/configs/nx25-ae250_defconfig +++ b/configs/ax25-ae350_defconfig @@ -1,11 +1,13 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_DEFAULT_DEVICE_TREE="ae250" -CONFIG_TARGET_NX25_AE250=y +CONFIG_DEFAULT_DEVICE_TREE="ae350" +CONFIG_TARGET_AX25_AE350=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SF_TEST=y @@ -25,6 +27,9 @@ CONFIG_MMC=y CONFIG_DM_MMC=y CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y @@ -38,3 +43,5 @@ CONFIG_DM_SPI=y CONFIG_ATCSPI200_SPI=y CONFIG_TIMER=y CONFIG_ATCPIT100_TIMER=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_CPU_RISCV_64=y diff --git a/doc/README.NX25 b/doc/README.AX25 index 9f054e5cf2..7a607dd1f8 100644 --- a/doc/README.NX25 +++ b/doc/README.AX25 @@ -1,4 +1,4 @@ -NX25 is Andes CPU IP to adopt RISC-V architecture. +AX25 is Andes CPU IP to adopt RISC-V architecture. Features ======== diff --git a/doc/README.ae250 b/doc/README.ae350 index 77c168af34..fe75b80eb7 100644 --- a/doc/README.ae250 +++ b/doc/README.ae350 @@ -1,16 +1,16 @@ -Andes Technology SoC AE250 +Andes Technology SoC AE350 =========================== -AE250 is the mainline SoC produced by Andes Technology using NX25 CPU core +AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core base on RISC-V architecture. -AE250 has integrated both AHB and APB bus and many periphals for application +AE350 has integrated both AHB and APB bus and many periphals for application and product development. -NX25-AE250 +AX25-AE350 ========= -NX25-AE250 is the SoC with AE250 hardcore CPU. +AX25-AE350 is the SoC with AE350 hardcore CPU. Configurations ============== @@ -18,14 +18,14 @@ Configurations CONFIG_SKIP_LOWLEVEL_INIT: If you want to boot this system from SPI ROM and bypass e-bios (the other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT - in "include/configs/nx25-ae250.h". + in "include/configs/ax25-ae350.h". Build and boot steps ==================== build: 1. Prepare the toolchains and make sure the $PATH to toolchains is correct. -2. Use `make nx25-ae250_defconfig` in u-boot root to build the image. +2. Use `make ax25-ae350_defconfig` in u-boot root to build the image. Verification ==================== @@ -49,7 +49,7 @@ Steps 5. Burn this u-boot image to spi rom by spi driver 6. Re-boot u-boot from spi flash with power off and power on. -Messages of U-Boot boot on AE250 board +Messages of U-Boot boot on AE350 board ====================================== U-Boot 2018.01-rc2-00033-g824f89a (Dec 21 2017 - 16:51:26 +0800) @@ -77,9 +77,9 @@ host 10.0.4.97 is alive RISC-V # mmc rescan RISC-V # fatls mmc 0:1 - 318907 u-boot-ae250-64.bin - 1252 hello_world_ae250_32.bin - 328787 u-boot-ae250-32.bin + 318907 u-boot-ae350-64.bin + 1252 hello_world_ae350_32.bin + 328787 u-boot-ae350-32.bin 3 file(s), 0 dir(s) @@ -98,8 +98,8 @@ Test passed 2 write: 40 ticks, 100 KiB/s 0.800 Mbps 3 read: 20 ticks, 200 KiB/s 1.600 Mbps -RISC-V # fatload mmc 0:1 0x600000 u-boot-ae250-32.bin -reading u-boot-ae250-32.bin +RISC-V # fatload mmc 0:1 0x600000 u-boot-ae350-32.bin +reading u-boot-ae350-32.bin 328787 bytes read in 324 ms (990.2 KiB/s) RISC-V # sf erase 0x0 0x51000 @@ -136,7 +136,7 @@ Boot bbl and riscv-linux via U-Boot on QEMU =========================================== 1. Build riscv-linux 2. Build bbl and riscv-linux with --with-payload -3. Prepare ae250.dtb +3. Prepare ae350.dtb 4. Creating OS-kernel images ./mkimage -A riscv -O linux -T kernel -C none -a 0x0000 -e 0x0000 -d bbl.bin bootmImage-bbl.bin Image Name: @@ -146,7 +146,7 @@ Boot bbl and riscv-linux via U-Boot on QEMU Load Address: 00000000 Entry Point: 00000000 -4. Copy bootmImage-bbl.bin and ae250.dtb to qemu sd card image +4. Copy bootmImage-bbl.bin and ae350.dtb to qemu sd card image 5. Message of booting riscv-linux from bbl via u-boot on qemu U-Boot 2018.03-rc4-00031-g2631273 (Mar 13 2018 - 15:02:55 +0800) @@ -177,7 +177,7 @@ RISC-V # fatls mmc 0:0 RISC-V # fatload mmc 0:0 0x00600000 bootmImage-bbl.bin 17901268 bytes read in 4642 ms (3.7 MiB/s) -RISC-V # fatload mmc 0:0 0x2000000 ae250.dtb +RISC-V # fatload mmc 0:0 0x2000000 ae350.dtb 1954 bytes read in 1 ms (1.9 MiB/s) RISC-V # setenv bootm_size 0x2000000 RISC-V # setenv fdt_high 0x1f00000 @@ -272,4 +272,4 @@ Wed Dec 1 10:00:00 CST 2010 TODO ================================================== -Boot bbl and riscv-linux via U-Boot on AE250 board +Boot bbl and riscv-linux via U-Boot on AE350 board diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index 00209e3388..9c15eb36d6 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -463,7 +463,7 @@ int ftsdc010_mmc_bind(struct udevice *dev) } static const struct udevice_id ftsdc010_mmc_ids[] = { - { .compatible = "andestech,atsdc010" }, + { .compatible = "andestech,atfsdc010" }, { } }; diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index eb593c90d7..9cec06510c 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o -obj-$(CONFIG_FTSMC020) += ftsmc020.o obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o diff --git a/drivers/mtd/ftsmc020.c b/drivers/mtd/ftsmc020.c deleted file mode 100644 index 41cdd0e59b..0000000000 --- a/drivers/mtd/ftsmc020.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> -#include <faraday/ftsmc020.h> - -struct ftsmc020_config { - unsigned int config; - unsigned int timing; -}; - -static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg) -{ - struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE; - - if (bank > 3) { - printf("bank # %u invalid\n", bank); - return; - } - - writel(cfg->config, &smc->bank[bank].cr); - writel(cfg->timing, &smc->bank[bank].tpr); -} - -void ftsmc020_init(void) -{ - struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS; - int i; - - for (i = 0; i < ARRAY_SIZE(config); i++) - ftsmc020_setup_bank(i, &config[i]); -} diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index 6c8474893d..c08889c4b1 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -104,18 +104,18 @@ static int _ftmac100_init(struct ftmac100_data *priv, unsigned char enetaddr[6]) for (i = 0; i < PKTBUFSRX; i++) { /* RXBUF_BADR */ - rxdes[i].rxdes2 = (unsigned int)net_rx_packets[i]; + rxdes[i].rxdes2 = (unsigned int)(unsigned long)net_rx_packets[i]; rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; } /* transmit ring */ - writel ((unsigned int)txdes, &ftmac100->txr_badr); + writel ((unsigned long)txdes, &ftmac100->txr_badr); /* receive ring */ - writel ((unsigned int)rxdes, &ftmac100->rxr_badr); + writel ((unsigned long)rxdes, &ftmac100->rxr_badr); /* poll receive descriptor automatically */ @@ -192,14 +192,14 @@ static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length) return -1; } - debug ("%s(%x, %x)\n", __func__, (int)packet, length); + debug ("%s(%lx, %x)\n", __func__, (unsigned long)packet, length); length = (length < ETH_ZLEN) ? ETH_ZLEN : length; /* initiate a transmit sequence */ - flush_dcache_range((u32)packet,(u32)packet+length); - curr_des->txdes2 = (unsigned int)packet; /* TXBUF_BADR */ + flush_dcache_range((unsigned long)packet,(unsigned long)packet+length); + curr_des->txdes2 = (unsigned int)(unsigned long)packet; /* TXBUF_BADR */ curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR; curr_des->txdes1 |= FTMAC100_TXDES1_FTS | @@ -343,7 +343,7 @@ static int ftmac100_recv(struct udevice *dev, int flags, uchar **packetp) int len; len = __ftmac100_recv(priv); if (len) - *packetp = (void *)curr_des->rxdes2; + *packetp = (uchar *)(unsigned long)curr_des->rxdes2; return len ? len : -EAGAIN; } diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c index 2c1d36ee67..be424e0a6f 100644 --- a/drivers/spi/atcspi200_spi.c +++ b/drivers/spi/atcspi200_spi.c @@ -197,7 +197,7 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns, int num_bytes; u8 *cmd_buf = ns->cmd_buf; size_t cmd_len = ns->cmd_len; - size_t data_len = bitlen / 8; + unsigned long data_len = bitlen / 8; int rf_cnt; int ret = 0; @@ -229,13 +229,13 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns, __atcspi200_spi_start(ns); break; } - debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %u\n", + debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\n", *(uint *)data_out, data_out, *(uint *)data_in, data_in, data_len); num_chunks = DIV_ROUND_UP(data_len, max_tran_len); din = data_in; dout = data_out; while (num_chunks--) { - tran_len = min(data_len, (size_t)max_tran_len); + tran_len = min((size_t)data_len, (size_t)max_tran_len); ns->tran_len = tran_len; num_blks = DIV_ROUND_UP(tran_len , CHUNK_SIZE); num_bytes = (tran_len) % CHUNK_SIZE; diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 8d5feb3ac7..d672e8ebe6 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -99,6 +99,10 @@ #define BOOTEFI_NAME "bootia32.efi" #elif defined(CONFIG_X86_RUN_64BIT) #define BOOTEFI_NAME "bootx64.efi" +#elif defined(CONFIG_CPU_RISCV_32) +#define BOOTEFI_NAME "bootriscv32.efi" +#elif defined(CONFIG_CPU_RISCV_64) +#define BOOTEFI_NAME "bootriscv64.efi" #endif #endif @@ -240,6 +244,7 @@ #if defined(CONFIG_CMD_DHCP) #if defined(CONFIG_EFI_LOADER) +/* http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml */ #if defined(CONFIG_ARM64) #define BOOTENV_EFI_PXE_ARCH "0xb" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00011:UNDI:003000" @@ -250,6 +255,12 @@ /* Always assume we're running 64bit */ #define BOOTENV_EFI_PXE_ARCH "0x7" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00007:UNDI:003000" +#elif defined(CONFIG_CPU_RISCV_32) +#define BOOTENV_EFI_PXE_ARCH "0x19" +#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00025:UNDI:003000" +#elif defined(CONFIG_CPU_RISCV_64) +#define BOOTENV_EFI_PXE_ARCH "0x1b" +#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00027:UNDI:003000" #else #error Please specify an EFI client identifier #endif diff --git a/include/configs/nx25-ae250.h b/include/configs/ax25-ae350.h index 930cdbd4e4..b1ca5ac11a 100644 --- a/include/configs/nx25-ae250.h +++ b/include/configs/ax25-ae350.h @@ -79,6 +79,44 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) +/* + * FLASH and environment organization + */ + +/* use CFI framework */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER + +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_CFI_FLASH_STATUS_POLL + +/* support JEDEC */ +#ifdef CONFIG_CFI_FLASH +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 +#endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ +#define PHYS_FLASH_1 0x88000000 /* BANK 0 */ +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 + +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ + +/* max number of memory banks */ +/* + * There are 4 banks supported for this Controller, + * but we have only 1 bank connected to flash on board +*/ +#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#endif +#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} + +/* max number of sectors on one chip */ +#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) +#define CONFIG_SYS_MAX_FLASH_SECT 512 + /* environments */ #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -104,4 +142,21 @@ /* Increase max gunzip size */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) +/* When we use RAM as ENV */ +#define CONFIG_ENV_SIZE 0x2000 + +/* Enable distro boot */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x00080000\0" \ + "pxefile_addr_r=0x01f00000\0" \ + "scriptaddr=0x01f00000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02800000\0" \ + BOOTENV + #endif /* __CONFIG_H */ diff --git a/include/efi_loader.h b/include/efi_loader.h index 2868ca25ab..ec000658f6 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -75,6 +75,13 @@ const char *__efi_nesting_dec(void); ##__VA_ARGS__); \ }) +#ifdef CONFIG_SYS_CACHELINE_SIZE +#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE +#else +/* Just use the greatest cache flush alignment requirement I'm aware of */ +#define EFI_CACHELINE_SIZE 128 +#endif + extern struct efi_runtime_services efi_runtime_services; extern struct efi_system_table systab; diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index d38780b604..2909e76960 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -1,6 +1,6 @@ config EFI_LOADER bool "Support running EFI Applications in U-Boot" - depends on (ARM || X86) && OF_LIBFDT + depends on (ARM || X86 || RISCV) && OF_LIBFDT # We do not support bootefi booting ARMv7 in non-secure mode depends on !ARMV7_NONSEC # We need EFI_STUB_64BIT to be set on x86_64 with EFI_STUB diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index e832cde901..b45f09591a 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -287,7 +287,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) /* Flush cache */ flush_cache((ulong)efi_reloc, - ALIGN(virt_size, CONFIG_SYS_CACHELINE_SIZE)); + ALIGN(virt_size, EFI_CACHELINE_SIZE)); invalidate_icache_all(); /* Populate the loaded image interface bits */ diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 52f1301d75..241090f6b4 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -29,13 +29,6 @@ static efi_status_t __efi_runtime EFIAPI efi_unimplemented(void); static efi_status_t __efi_runtime EFIAPI efi_device_error(void); static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void); -#ifdef CONFIG_SYS_CACHELINE_SIZE -#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE -#else -/* Just use the greatest cache flush alignment requirement I'm aware of */ -#define EFI_CACHELINE_SIZE 128 -#endif - #if defined(CONFIG_ARM64) #define R_RELATIVE 1027 #define R_MASK 0xffffffffULL @@ -47,6 +40,25 @@ static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void); #include <asm/elf.h> #define R_RELATIVE R_386_RELATIVE #define R_MASK 0xffULL +#elif defined(CONFIG_RISCV) +#include <elf.h> +#define R_RELATIVE R_RISCV_RELATIVE +#define R_MASK 0xffULL +#define IS_RELA 1 + +struct dyn_sym { + ulong foo1; + ulong addr; + u32 foo2; + u32 foo3; +}; +#ifdef CONFIG_CPU_RISCV_32 +#define R_ABSOLUTE R_RISCV_32 +#define SYM_INDEX 8 +#else +#define R_ABSOLUTE R_RISCV_64 +#define SYM_INDEX 32 +#endif #else #error Need to add relocation awareness #endif @@ -253,15 +265,27 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) p = (void*)((ulong)rel->offset - base) + gd->relocaddr; - if ((rel->info & R_MASK) != R_RELATIVE) { - continue; - } + debug("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, rel->info, *p, rel->offset); + switch (rel->info & R_MASK) { + case R_RELATIVE: #ifdef IS_RELA newaddr = rel->addend + offset - CONFIG_SYS_TEXT_BASE; #else newaddr = *p - lastoff + offset; #endif + break; +#ifdef R_ABSOLUTE + case R_ABSOLUTE: { + ulong symidx = rel->info >> SYM_INDEX; + extern struct dyn_sym __dyn_sym_start[]; + newaddr = __dyn_sym_start[symidx].addr + offset; + break; + } +#endif + default: + continue; + } /* Check if the relocation is inside bounds */ if (map && ((newaddr < map->virtual_start) || |