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-rw-r--r--arch/powerpc/cpu/mpc85xx/t2080_serdes.c26
-rw-r--r--board/freescale/t208xqds/eth_t208xqds.c8
-rw-r--r--board/freescale/t208xqds/t2080_rcw.cfg2
-rw-r--r--board/freescale/t208xqds/t208xqds.c12
-rw-r--r--board/freescale/t208xrdb/t2080_rcw.cfg2
5 files changed, 38 insertions, 12 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
index 07e27deb1f..2b7c698f30 100644
--- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
@@ -43,6 +43,10 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
{0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10,
SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
PCIE4, PCIE4, PCIE4, PCIE4} },
+ {0x1B, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
+ SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
{0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
@@ -59,18 +63,34 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+ {0x50, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
+ XAUI_FM1_MAC9, XAUI_FM1_MAC9,
+ PCIE4, SGMII_FM1_DTSEC4,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
{0x51, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
XAUI_FM1_MAC9, XAUI_FM1_MAC9,
PCIE4, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+ {0x5E, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+ HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+ PCIE4, SGMII_FM1_DTSEC4,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
{0x5F, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
PCIE4, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+ {0x64, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+ HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
+ PCIE4, SGMII_FM1_DTSEC4,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
{0x65, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
PCIE4, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+ {0x6A, {XFI_FM1_MAC9, XFI_FM1_MAC10,
+ XFI_FM1_MAC1, XFI_FM1_MAC2,
+ PCIE4, SGMII_FM1_DTSEC4,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
{0x6B, {XFI_FM1_MAC9, XFI_FM1_MAC10,
XFI_FM1_MAC1, XFI_FM1_MAC2,
PCIE4, SGMII_FM1_DTSEC4,
@@ -115,6 +135,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
{0xD9, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+ {0xD2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
+ SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
+ SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
{0xD3, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
@@ -127,8 +150,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
{0x66, {XFI_FM1_MAC9, XFI_FM1_MAC10,
XFI_FM1_MAC1, XFI_FM1_MAC2,
PCIE4, PCIE4, PCIE4, PCIE4} },
-
-#if defined(CONFIG_PPC_T2081)
{0xAA, {PCIE3, PCIE3, PCIE3, PCIE3,
PCIE4, PCIE4, PCIE4, PCIE4} },
{0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
@@ -137,7 +158,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
{0x70, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1,
SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
-#endif
{}
};
diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c
index d7a804d22a..5879198e4d 100644
--- a/board/freescale/t208xqds/eth_t208xqds.c
+++ b/board/freescale/t208xqds/eth_t208xqds.c
@@ -416,6 +416,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC10, RGMII_PHY2_ADDR);
switch (srds_s1) {
+ case 0x1b:
case 0x1c:
case 0x95:
case 0xa2:
@@ -429,8 +430,11 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
break;
+ case 0x50:
case 0x51:
+ case 0x5e:
case 0x5f:
+ case 0x64:
case 0x65:
/* T2080QDS: XAUI/HiGig in Slot3; T2081QDS: in Slot2 */
fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR);
@@ -439,6 +443,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
break;
case 0x66:
+ case 0x67:
/*
* XFI does not need a PHY to work, but to avoid U-boot use
* default PHY address which is zero to a MAC when it found
@@ -453,6 +458,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_10GEC3, 6);
fm_info_set_phy_address(FM1_10GEC4, 7);
break;
+ case 0x6a:
case 0x6b:
fm_info_set_phy_address(FM1_10GEC1, 4);
fm_info_set_phy_address(FM1_10GEC2, 5);
@@ -470,6 +476,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
break;
+ case 0x70:
case 0x71:
/* SGMII in Slot3 */
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
@@ -625,6 +632,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
if ((srds_s1 == 0x66) || (srds_s1 == 0x6b) ||
+ (srds_s1 == 0x6a) || (srds_s1 == 0x70) ||
(srds_s1 == 0x6c) || (srds_s1 == 0x6d) ||
(srds_s1 == 0x71)) {
/* As XFI is in cage intead of a slot, so
diff --git a/board/freescale/t208xqds/t2080_rcw.cfg b/board/freescale/t208xqds/t2080_rcw.cfg
index c2ad0fda55..972dedc687 100644
--- a/board/freescale/t208xqds/t2080_rcw.cfg
+++ b/board/freescale/t208xqds/t2080_rcw.cfg
@@ -3,6 +3,6 @@ aa55aa55 010e0100
#SerDes Protocol: 0x66_0x16
#Core/DDR: 1533Mhz/2133MT/s
12100017 15000000 00000000 00000000
-66160002 00008400 e8104000 c1000000
+66150002 00008400 e8104000 c1000000
00000000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 9cfc0bd7c3..135343949e 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -105,6 +105,7 @@ int brd_mux_lane_to_slot(void)
/* SerDes1 is not enabled */
break;
#if defined(CONFIG_T2080QDS)
+ case 0x1b:
case 0x1c:
case 0xa2:
/* SD1(A:D) => SLOT3 SGMII
@@ -126,6 +127,7 @@ int brd_mux_lane_to_slot(void)
*/
QIXIS_WRITE(brdcfg[12], 0x3a);
break;
+ case 0x50:
case 0x51:
/* SD1(A:D) => SLOT3 XAUI
* SD1(E) => SLOT1 PCIe4
@@ -140,6 +142,7 @@ int brd_mux_lane_to_slot(void)
*/
QIXIS_WRITE(brdcfg[12], 0xfe);
break;
+ case 0x6a:
case 0x6b:
/* SD1(A:D) => XFI cage
* SD1(E) => SLOT1 PCIe4
@@ -184,6 +187,7 @@ int brd_mux_lane_to_slot(void)
QIXIS_WRITE(brdcfg[12], 0x1a);
break;
#elif defined(CONFIG_T2081QDS)
+ case 0x50:
case 0x51:
/* SD1(A:D) => SLOT2 XAUI
* SD1(E) => SLOT1 PCIe4 x1
@@ -192,6 +196,7 @@ int brd_mux_lane_to_slot(void)
QIXIS_WRITE(brdcfg[12], 0x98);
QIXIS_WRITE(brdcfg[13], 0x70);
break;
+ case 0x6a:
case 0x6b:
/* SD1(A:D) => XFI SFP Module
* SD1(E) => SLOT1 PCIe4 x1
@@ -201,13 +206,6 @@ int brd_mux_lane_to_slot(void)
QIXIS_WRITE(brdcfg[13], 0x70);
break;
case 0x6c:
- /* SD1(A:B) => XFI SFP Module
- * SD1(C:D) => SLOT2 SGMII
- * SD1(E:H) => SLOT1 PCIe4 x4
- */
- QIXIS_WRITE(brdcfg[12], 0xe8);
- QIXIS_WRITE(brdcfg[13], 0x0);
- break;
case 0x6d:
/* SD1(A:B) => XFI SFP Module
* SD1(C:D) => SLOT2 SGMII
diff --git a/board/freescale/t208xrdb/t2080_rcw.cfg b/board/freescale/t208xrdb/t2080_rcw.cfg
index cd62cc8641..15e1bf43dd 100644
--- a/board/freescale/t208xrdb/t2080_rcw.cfg
+++ b/board/freescale/t208xrdb/t2080_rcw.cfg
@@ -3,6 +3,6 @@ aa55aa55 010e0100
#SerDes Protocol: 0x66_0x16
#Core/DDR: 1533Mhz/1600MT/s
120c0017 15000000 00000000 00000000
-66160002 00008400 ec104000 c1000000
+66150002 00008400 ec104000 c1000000
00000000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004
generated by cgit (git 2.34.1) at 2024-12-23 23:49:51 +0000