diff options
35 files changed, 883 insertions, 104 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index 949eb28dfa..e510e971b4 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -93,6 +93,7 @@ config SANDBOX select PCI_ENDPOINT select SPI select SUPPORT_OF_CONTROL + select SYSRESET_CMD_POWEROFF if CMD_POWEROFF imply BITREVERSE select BLOBLIST imply CMD_DM diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e021888ce4..ebe5495d44 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -119,6 +119,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ rk3399-puma-ddr1866.dtb \ + rk3399-roc-pc.dtb \ rk3399-rock-pi-4.dtb \ rk3399-rock960.dtb \ rk3399-rockpro64.dtb diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi new file mode 100644 index 0000000000..77d5cf5d3c --- /dev/null +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Levin Du <djw@t-chip.com.cn> + */ + +#include "rk3399-u-boot.dtsi" +#include "rk3399-sdram-lpddr4-100.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + }; +}; + +&vdd_log { + regulator-min-microvolt = <430000>; + regulator-init-microvolt = <950000>; +}; diff --git a/arch/arm/dts/rk3399-roc-pc.dts b/arch/arm/dts/rk3399-roc-pc.dts new file mode 100644 index 0000000000..19f7732d72 --- /dev/null +++ b/arch/arm/dts/rk3399-roc-pc.dts @@ -0,0 +1,680 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd + */ + +/dts-v1/; +#include <dt-bindings/pwm/pwm.h> +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Firefly ROC-RK3399-PC Board"; + compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 25000 0>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + vcc_vbus_typec0: vcc-vbus-typec0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_vbus_typec0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + /* + * should be placed inside mp8859, but not until mp8859 has + * its own dt-binding. + */ + vcc12v_sys: mp8859-dcdc1 { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + vin-supply = <&vcc_vbus_typec0>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc12v_sys>; + }; + + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en &hub_rst>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc_vbus_typec1: vcc-vbus-typec1 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_vbus_typec1_en>; + regulator-name = "vcc_vbus_typec1"; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_sys>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc3v3_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + vcc10-supply = <&vcc3v3_sys>; + vcc11-supply = <&vcc3v3_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc1v8_pmu>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_codec: LDO_REG1 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_hdmi: LDO_REG2 { + regulator-name = "vcc1v8_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu: LDO_REG3 { + regulator-name = "vcc1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca0v9_hdmi: LDO_REG7 { + regulator-name = "vcca0v9_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_gpio>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_gpio>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + fusb1: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&fusb1_int>; + vbus-supply = <&vcc_vbus_typec1>; + status = "okay"; + }; +}; + +&i2c7 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + fusb0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + vbus-supply = <&vcc_vbus_typec0>; + status = "okay"; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + audio-supply = <&vcca1v8_codec>; + bt656-supply = <&vcc_3v0>; + gpio1830-supply = <&vcc_3v0>; + sdmmc-supply = <&vcc_sdio>; + status = "okay"; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pinctrl { + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hub_rst: hub-rst { + rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + usb-typec { + vcc_vbus_typec1_en: vcc-vbus-typec1-en { + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + fusb30x { + fusb0_int: fusb0-int { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + fusb1_int: fusb1-int { + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + phy-supply = <&vcc_vbus_typec0>; + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + phy-supply = <&vcc_vbus_typec1>; + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 77450604b0..ad5fd46ccd 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -12,9 +12,6 @@ obj-y += spl.o else obj-y += bsec.o obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o -ifndef CONFIG_STM32MP1_TRUSTED -obj-$(CONFIG_SYSRESET) += cmd_poweroff.o -endif endif obj-$(CONFIG_ARMV7_PSCI) += psci.o obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o diff --git a/arch/arm/mach-stm32mp/cmd_poweroff.c b/arch/arm/mach-stm32mp/cmd_poweroff.c deleted file mode 100644 index f54dd1daf2..0000000000 --- a/arch/arm/mach-stm32mp/cmd_poweroff.c +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2019, STMicroelectronics - All Rights Reserved - */ - -#include <common.h> -#include <command.h> -#include <sysreset.h> - -int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - int ret; - - puts("poweroff ...\n"); - mdelay(100); - - ret = sysreset_walk(SYSRESET_POWER); - - if (ret == -EINPROGRESS) - mdelay(1000); - - /*NOTREACHED when power off*/ - return CMD_RET_FAILURE; -} diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index 2333240fda..dee5fde4f7 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -355,7 +355,6 @@ void state_reset_for_test(struct sandbox_state *state) { /* No reset yet, so mark it as such. Always allow power reset */ state->last_sysreset = SYSRESET_COUNT; - state->sysreset_allowed[SYSRESET_POWER] = true; state->sysreset_allowed[SYSRESET_POWER_OFF] = true; memset(&state->wdt, '\0', sizeof(state->wdt)); diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index d9711ab227..f8299d9460 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -49,6 +49,12 @@ F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi +ROC-RK3399-PC +M: Levin Du <djw@t-chip.com.cn> +S: Maintained +F: configs/roc-rk3399-pc_defconfig +F: arch/arm/dts/rk3399-roc-pc-u-boot.dtsi + ROCK-PI-4 M: Akash Gajjar <akash@openedev.com> M: Jagan Teki <jagan@amarulasolutions.com> diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index e9c3a8d152..f7beb790d2 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_ROCKCHIP_RK3288=y @@ -11,14 +12,17 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y -# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +# CONFIG_SPL_CRC32_SUPPORT is not set +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -39,16 +43,15 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_OF_PLATDATA=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set +# CONFIG_SPL_BLK is not set CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -58,12 +61,18 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +# CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PINCTRL=y +CONFIG_PINCONF=y CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINMUX is not set +CONFIG_SPL_PINCONF=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_RK8XX=y @@ -77,16 +86,14 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Rockchip" -CONFIG_USB_GADGET_VENDOR_NUM=0x2207 -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a -CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index ac516115d2..10b041e73f 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_ROCKCHIP_RK3288=y @@ -10,7 +11,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y -# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_LOG=y @@ -19,8 +19,12 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_TEXT_BASE=0xff704000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +# CONFIG_SPL_CRC32_SUPPORT is not set +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -42,16 +46,15 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_OF_PLATDATA=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set +# CONFIG_SPL_BLK is not set CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -61,12 +64,18 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +# CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PINCTRL=y +CONFIG_PINCONF=y CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINMUX is not set +CONFIG_SPL_PINCONF=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_RK8XX=y @@ -82,19 +91,17 @@ CONFIG_I2S_ROCKCHIP=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Rockchip" -CONFIG_USB_GADGET_VENDOR_NUM=0x2207 -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a -CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set CONFIG_CONSOLE_TRUETYPE=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y # CONFIG_USE_PRIVATE_LIBGCC is not set +CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 64142e026d..a133276559 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_ROCKCHIP_RK3288=y @@ -11,15 +12,18 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y -# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_TEXT_BASE=0xff704000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +# CONFIG_SPL_CRC32_SUPPORT is not set +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -41,16 +45,15 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_OF_PLATDATA=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set +# CONFIG_SPL_BLK is not set CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -60,12 +63,18 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +# CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PINCTRL=y +CONFIG_PINCONF=y CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINMUX is not set +CONFIG_SPL_PINCONF=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_RK8XX=y @@ -82,18 +91,16 @@ CONFIG_SOUND_MAX98090=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Rockchip" -CONFIG_USB_GADGET_VENDOR_NUM=0x2207 -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a -CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 +CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 4179e80a8c..7891d62af1 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_ROCKCHIP_RK3288=y @@ -11,7 +12,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y -# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" @@ -19,8 +19,12 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_TEXT_BASE=0xff704000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +# CONFIG_SPL_CRC32_SUPPORT is not set +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -47,11 +51,9 @@ CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set +# CONFIG_SPL_BLK is not set CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -61,12 +63,16 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +# CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PINCTRL=y +CONFIG_PINCONF=y CONFIG_SPL_PINCTRL=y -# CONFIG_SPL_PINCTRL_FULL is not set CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_RK8XX=y @@ -80,20 +86,17 @@ CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Rockchip" -CONFIG_USB_GADGET_VENDOR_NUM=0x2207 -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a -CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set CONFIG_CONSOLE_TRUETYPE=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y # CONFIG_USE_PRIVATE_LIBGCC is not set +CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y -# CONFIG_SPL_OF_LIBFDT is not set diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 1b164557ab..d4d5a02740 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -45,6 +46,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PINCTRL=y # CONFIG_SPL_DM_SERIAL is not set CONFIG_DEBUG_UART_SHIFT=2 @@ -56,7 +58,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x310a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index b47a90e391..3f9a94d517 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OPTEE=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 25bd4ef2f4..405fde0c80 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -74,7 +75,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index ab0faccbc6..c6d1ddbd6b 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -76,7 +77,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index d7dcb82344..7ca522b479 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -81,7 +82,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index e0dc09574f..c254d3e5cf 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -47,6 +48,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PINCTRL=y CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_DM_SERIAL is not set @@ -60,7 +62,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x310a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 3f5d502eda..1fee1be58a 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -76,7 +77,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index c6b6590d35..7cfbd50c1e 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -80,7 +81,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 11bbfe5695..efa20d0800 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -76,7 +77,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/roc-rk3399-pc_defconfig b/configs/roc-rk3399-pc_defconfig new file mode 100644 index 0000000000..09e9b8a756 --- /dev/null +++ b/configs/roc-rk3399-pc_defconfig @@ -0,0 +1,61 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_TPL=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index bf2f2a0f4e..9d5f3b59e8 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -77,7 +78,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 73b442fc93..443f4d88b9 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -75,7 +76,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip" CONFIG_USB_GADGET_VENDOR_NUM=0x2207 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 2ac73af934..e74a662d1d 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -212,7 +212,11 @@ ofnode ofnode_get_parent(ofnode node) const char *ofnode_get_name(ofnode node) { - assert(ofnode_valid(node)); + if (!ofnode_valid(node)) { + debug("%s node not valid\n", __func__); + return NULL; + } + if (ofnode_is_np(node)) return strrchr(node.np->full_name, '/') + 1; diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index cb1d10b2a9..586772fdec 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -241,6 +241,7 @@ config DM_PMIC_TPS65910 config PMIC_STPMIC1 bool "Enable support for STMicroelectronics STPMIC1 PMIC" depends on DM_PMIC && DM_I2C + select SYSRESET_CMD_POWEROFF if CMD_POWEROFF && !ARM_PSCI_FW ---help--- The STPMIC1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches. It is accessed via an I2C interface. The device is used with STM32MP1 diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index 90c41ab44d..f565ae0310 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -33,6 +33,16 @@ config TPL_SYSRESET if SYSRESET +if CMD_POWEROFF + +config SYSRESET_CMD_POWEROFF + bool "sysreset implementation of the poweroff command" + help + This should be selected by the appropriate PMIC driver if + the poweroff command is enabled. + +endif + config SYSRESET_GPIO bool "Enable support for GPIO reset driver" select DM_GPIO diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index ad831c703a..39202588ae 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -118,6 +118,24 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +#if IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) +int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int ret; + + puts("poweroff ...\n"); + mdelay(100); + + ret = sysreset_walk(SYSRESET_POWER_OFF); + + if (ret == -EINPROGRESS) + mdelay(1000); + + /*NOTREACHED when power off*/ + return CMD_RET_FAILURE; +} +#endif + static int sysreset_post_bind(struct udevice *dev) { #if defined(CONFIG_NEEDS_MANUAL_RELOC) diff --git a/drivers/sysreset/sysreset_psci.c b/drivers/sysreset/sysreset_psci.c index de2ec8aeb1..c7907b3226 100644 --- a/drivers/sysreset/sysreset_psci.c +++ b/drivers/sysreset/sysreset_psci.c @@ -18,7 +18,7 @@ static int psci_sysreset_request(struct udevice *dev, enum sysreset_t type) case SYSRESET_COLD: function_id = PSCI_0_2_FN_SYSTEM_RESET; break; - case SYSRESET_POWER: + case SYSRESET_POWER_OFF: function_id = PSCI_0_2_FN_SYSTEM_OFF; break; default: diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c index 7dfd89460f..69c22a7000 100644 --- a/drivers/sysreset/sysreset_sandbox.c +++ b/drivers/sysreset/sysreset_sandbox.c @@ -57,13 +57,13 @@ static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type) case SYSRESET_COLD: state->last_sysreset = type; break; - case SYSRESET_POWER: + case SYSRESET_POWER_OFF: state->last_sysreset = type; if (!state->sysreset_allowed[type]) return -EACCES; sandbox_exit(); break; - case SYSRESET_POWER_OFF: + case SYSRESET_POWER: if (!state->sysreset_allowed[type]) return -EACCES; sandbox_exit(); diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index ec0e157ec5..66331a1376 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -28,15 +28,8 @@ #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) -#define CONFIG_SPI_FLASH_GIGADEVICE - #ifndef CONFIG_SPL_BUILD -/* usb otg */ - -/* usb mass storage */ -#define CONFIG_CMD_USB_MASS_STORAGE -/* usb host */ #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "pxefile_addr_r=0x60100000\0" \ diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 42a49c5502..f2fb7e07b9 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -31,12 +31,7 @@ #define SDRAM_MAX_SIZE 0x80000000 #ifndef CONFIG_SPL_BUILD -/* usb otg */ -/* usb mass storage */ -#define CONFIG_CMD_USB_MASS_STORAGE - -/* usb host */ #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "pxefile_addr_r=0x60100000\0" \ diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index eaa1c582e9..84b474ac7b 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -43,12 +43,7 @@ #define CONFIG_SYS_MONITOR_LEN (600 * 1024) #ifndef CONFIG_SPL_BUILD -/* usb otg */ -/* usb mass storage */ -#define CONFIG_CMD_USB_MASS_STORAGE - -/* usb host support */ #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ diff --git a/include/configs/veyron.h b/include/configs/veyron.h index 0761de3ad2..2ab6d6c6aa 100644 --- a/include/configs/veyron.h +++ b/include/configs/veyron.h @@ -13,8 +13,6 @@ #include <configs/rk3288_common.h> -#define CONFIG_SPI_FLASH_GIGADEVICE - #define CONFIG_KEYBOARD #endif diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index 382fdac4c0..3574a3b5a5 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -17,7 +17,6 @@ func(MMC, mmc, 1) \ #define CONFIG_SYS_MMC_ENV_DEV 1 -#undef CONFIG_CMD_USB_MASS_STORAGE #ifndef CONFIG_TPL_BUILD |