diff options
| -rw-r--r-- | drivers/serial/Kconfig | 10 | ||||
| -rw-r--r-- | include/configs/bayleybay.h | 2 | ||||
| -rw-r--r-- | include/configs/crownbay.h | 1 | ||||
| -rw-r--r-- | include/configs/galileo.h | 2 | ||||
| -rw-r--r-- | include/configs/minnowmax.h | 2 | ||||
| -rw-r--r-- | include/configs/qemu-x86.h | 2 | ||||
| -rw-r--r-- | include/configs/x86-chromebook.h | 2 |
7 files changed, 11 insertions, 10 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 4829284216..078246d22f 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -102,3 +102,13 @@ config UNIPHIER_SERIAL help If you have a UniPhier based board and want to use the on-chip serial ports, say Y to this option. If unsure, say N. + +config X86_SERIAL + bool "Support for 16550 serial port on x86 machines" + depends on X86 + default y + help + Most x86 machines have a ns16550 UART or compatible. This can be + enabled in the device tree with the correct input clock frequency + provided (default 1843200). Enable this to obtain serial console + output. diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index 740166afd3..ecda4bae08 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_MISC_INIT -#define CONFIG_X86_SERIAL - #define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 6cf53a3e42..1ea320bcb5 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -17,7 +17,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT -#define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M #define CONFIG_PCI_MEM_BUS 0x40000000 diff --git a/include/configs/galileo.h b/include/configs/galileo.h index fd89bf30ef..3c3c6e9d54 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -17,8 +17,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT -#define CONFIG_X86_SERIAL - /* ns16550 UART is memory-mapped in Quark SoC */ #undef CONFIG_SYS_NS16550_PORT_MAPPED diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 655ce3d422..d0a8aa696a 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -16,7 +16,7 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_EARLY_INIT_R -#define CONFIG_X86_SERIAL +#define CONFIG_SMSC_LPC47M #define CONFIG_PCI_MEM_BUS 0xd0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 78c296f5ad..c25e331579 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_MISC_INIT -#define CONFIG_X86_SERIAL - #define CONFIG_PCI_MEM_BUS 0xc0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS #define CONFIG_PCI_MEM_SIZE 0x10000000 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index e8f0bac01c..d5dd61913c 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -17,8 +17,6 @@ #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 -#define CONFIG_X86_SERIAL - #define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ |