diff options
| -rw-r--r-- | arch/arm/mach-omap2/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/am33xx/Kconfig | 7 | ||||
| -rw-r--r-- | board/olimex/am335x_som/Kconfig | 15 | ||||
| -rw-r--r-- | board/olimex/am335x_som/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/olimex/am335x_som/Makefile | 13 | ||||
| -rw-r--r-- | board/olimex/am335x_som/README | 1 | ||||
| -rw-r--r-- | board/olimex/am335x_som/board.c | 156 | ||||
| -rw-r--r-- | board/olimex/am335x_som/board.h | 16 | ||||
| -rw-r--r-- | board/olimex/am335x_som/mux.c | 73 | ||||
| -rw-r--r-- | board/olimex/am335x_som/u-boot.lds | 128 | ||||
| -rw-r--r-- | configs/am335x_olimex_som_defconfig | 23 | ||||
| -rw-r--r-- | configs/am335x_olimex_som_nandboot_defconfig | 24 | ||||
| -rw-r--r-- | include/configs/am335x_evm.h | 10 | ||||
| -rw-r--r-- | include/configs/olimex_am335x_som.h | 166 |
14 files changed, 638 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 48bc80a639..4180252c26 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -187,6 +187,7 @@ source "board/ti/am335x/Kconfig" source "board/compulab/cm_t335/Kconfig" source "board/compulab/cm_t43/Kconfig" source "board/phytec/phycore_am335x_r2/Kconfig" +source "board/olimex/am335x_som/Kconfig" config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 9a98e8a0a9..767e37fe72 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -103,6 +103,13 @@ config TARGET_AM335X_SL50 select DM_SERIAL imply CMD_DM +config TARGET_AM335X_OLIMEX_SOM + bool "Support am335x_olimex_som" + select BOARD_LATE_INIT + select DM + select DM_SERIAL + select DM_GPIO + config TARGET_BRXRE1 bool "Support BRXRE1" select BOARD_LATE_INIT diff --git a/board/olimex/am335x_som/Kconfig b/board/olimex/am335x_som/Kconfig new file mode 100644 index 0000000000..3b4a471744 --- /dev/null +++ b/board/olimex/am335x_som/Kconfig @@ -0,0 +1,15 @@ +if TARGET_AM335X_OLIMEX_SOM + +config SYS_BOARD + default "am335x_som" + +config SYS_VENDOR + default "olimex" + +config SYS_SOC + default "am33xx" + +config SYS_CONFIG_NAME + default "olimex_am335x_som" + +endif diff --git a/board/olimex/am335x_som/MAINTAINERS b/board/olimex/am335x_som/MAINTAINERS new file mode 100644 index 0000000000..fc30c384f6 --- /dev/null +++ b/board/olimex/am335x_som/MAINTAINERS @@ -0,0 +1,6 @@ +AM3352-SOM BOARD +M: Stefan Mavrodiev <stefan.mavrodiev@gmail.com> +S: Maintained +F: board/olimex/am3352_som +F: include/configs/am3352_som.h +F: configs/am3352_som_defconfig diff --git a/board/olimex/am335x_som/Makefile b/board/olimex/am335x_som/Makefile new file mode 100644 index 0000000000..804ac379db --- /dev/null +++ b/board/olimex/am335x_som/Makefile @@ -0,0 +1,13 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),) +obj-y := mux.o +endif + +obj-y += board.o diff --git a/board/olimex/am335x_som/README b/board/olimex/am335x_som/README new file mode 100644 index 0000000000..f744ace997 --- /dev/null +++ b/board/olimex/am335x_som/README @@ -0,0 +1 @@ +BSP for VScom OnRISC Balios family devices, like Balios iR 5221. diff --git a/board/olimex/am335x_som/board.c b/board/olimex/am335x_som/board.c new file mode 100644 index 0000000000..583baf9530 --- /dev/null +++ b/board/olimex/am335x_som/board.c @@ -0,0 +1,156 @@ +/* + * board.c + * + * Board functions for TI AM335X based boards + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +//#include <libfdt.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <asm/emif.h> +#include <asm/gpio.h> +#include <env.h> +#include <watchdog.h> +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_SPL_BUILD) +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; +#endif + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +static const struct ddr_data ddr3_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, +}; + +static const struct cmd_control ddr3_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + +static struct emif_regs ddr3_emif_reg_data = { + .sdram_config = MT41J512M8RH125_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, +}; + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = { + 400, OSC-1, 1, -1, -1, -1, -1}; + // 303, OSC-1, 1, -1, -1, -1, -1}; + +void am33xx_spl_board_init(void) +{ + /* Get the frequency */ + dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); + + /* Set CORE Frequencies to OPP100 */ + do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); + + /* Set MPU Frequency to what we detected now that voltages are set */ + do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); +} + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +void set_uart_mux_conf(void) +{ + enable_uart0_pin_mux(); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, +}; + +void sdram_init(void) +{ + config_ddr(400, &ioregs, + &ddr3_data, + &ddr3_cmd_ctrl_data, + &ddr3_emif_reg_data, 0); + + udelay(500); +} +#endif + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; +#if defined(CONFIG_NAND) + gpmc_init(); +#endif + return 0; +} + +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) +int board_mmc_init(bd_t *bis) +{ + return omap_mmc_init(0, 0, 0, -1, -1); +} +#endif + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + return 0; +} +#endif + +int ft_board_setup(void *fdt, struct bd_info *bd) +{ + return 0; +} + +int board_fit_config_name_match(const char *name) +{ + return 0; +} diff --git a/board/olimex/am335x_som/board.h b/board/olimex/am335x_som/board.h new file mode 100644 index 0000000000..a027d8e1c0 --- /dev/null +++ b/board/olimex/am335x_som/board.h @@ -0,0 +1,16 @@ +/* + * board.h + * + * TI AM335x boards information header + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +void enable_uart0_pin_mux(void); +void enable_board_pin_mux(void); +#endif diff --git a/board/olimex/am335x_som/mux.c b/board/olimex/am335x_som/mux.c new file mode 100644 index 0000000000..c2beb3ad19 --- /dev/null +++ b/board/olimex/am335x_som/mux.c @@ -0,0 +1,73 @@ +/* + * mux.c + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <i2c.h> +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE)}, /* MMC0_CD */ + {-1}, +}; + +#if defined(CONFIG_NAND) +static struct module_pin_mux nand_pin_mux[] = { + {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ + {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ + {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ + {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ + {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ + {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ + {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ + {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ + {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ + {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ + {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ + {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ + {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ + {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ + {-1}, +}; +#endif + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void enable_board_pin_mux() +{ + configure_module_pin_mux(mmc0_pin_mux); +#if defined(CONFIG_NAND) + configure_module_pin_mux(nand_pin_mux); +#endif +} diff --git a/board/olimex/am335x_som/u-boot.lds b/board/olimex/am335x_som/u-boot.lds new file mode 100644 index 0000000000..6b0ce0d737 --- /dev/null +++ b/board/olimex/am335x_som/u-boot.lds @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2004-2008 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.__image_copy_start) + *(.vectors) + CPUDIR/start.o (.text*) + board/olimex/am335x_som/built-in.o (.text*) + *(.text*) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { + *(.data*) + } + + . = ALIGN(4); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = ALIGN(4); + + .image_copy_end : + { + *(.__image_copy_end) + } + + .rel_dyn_start : + { + *(.__rel_dyn_start) + } + + .rel.dyn : { + *(.rel*) + } + + .rel_dyn_end : + { + *(.__rel_dyn_end) + } + + .hash : { *(.hash*) } + + .end : + { + *(.__end) + } + + _image_binary_end = .; + + /* + * Deprecated: this MMU section is used by pxa at present but + * should not be used by new boards/CPUs. + */ + . = ALIGN(4096); + .mmutable : { + *(.mmutable) + } + +/* + * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c + * __bss_base and __bss_limit are for linker only (overlay ordering) + */ + + .bss_start __rel_dyn_start (OVERLAY) : { + KEEP(*(.__bss_start)); + __bss_base = .; + } + + .bss __bss_base (OVERLAY) : { + *(.bss*) + . = ALIGN(4); + __bss_limit = .; + } + + .bss_end __bss_limit (OVERLAY) : { + KEEP(*(.__bss_end)); + } + + .dynsym _image_binary_end : { *(.dynsym) } + .dynbss : { *(.dynbss) } + .dynstr : { *(.dynstr*) } + .dynamic : { *(.dynamic*) } + .gnu.hash : { *(.gnu.hash) } + .plt : { *(.plt*) } + .interp : { *(.interp*) } + .gnu : { *(.gnu*) } + .ARM.exidx : { *(.ARM.exidx*) } +} diff --git a/configs/am335x_olimex_som_defconfig b/configs/am335x_olimex_som_defconfig new file mode 100644 index 0000000000..b192128e9d --- /dev/null +++ b/configs/am335x_olimex_som_defconfig @@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_TARGET_AM335X_OLIMEX_SOM=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_EXTRA_OPTIONS="NAND" +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_ASKENV=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_CMD_NET is not set +CONFIG_SYS_NS16550=y +CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_olimex_som_nandboot_defconfig b/configs/am335x_olimex_som_nandboot_defconfig new file mode 100644 index 0000000000..003032e878 --- /dev/null +++ b/configs/am335x_olimex_som_nandboot_defconfig @@ -0,0 +1,24 @@ +CONFIG_ARM=y +CONFIG_TARGET_AM335X_OLIMEX_SOM=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_NAND_BOOT=y +CONFIG_SPL=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_EXTRA_OPTIONS="NAND" +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_ASKENV=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_CMD_NET is not set +CONFIG_SYS_NS16550=y +CONFIG_OF_LIBFDT=y diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9c4ef369c5..e847d796aa 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -87,12 +87,13 @@ BOOT_TARGET_PXE(func) \ BOOT_TARGET_DHCP(func) -#include <config_distro_bootcmd.h> +//#include <config_distro_bootcmd.h> #ifndef CONFIG_SPL_BUILD #include <environment/ti/dfu.h> #include <environment/ti/mmc.h> +#if 0 #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ @@ -169,6 +170,13 @@ BOOTENV #endif +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x82000000\0" \ + "fdtaddr=0x88000000\0" \ + "bootargs=console=ttyO0,115200n8 rootwait root=/dev/mmcblk0p1\0" \ + "bootcmd=ext4load mmc 0:1 $loadaddr /boot/zImage; ext4load mmc 0:1 $fdtaddr /boot/am335x-olimex-som.dtb; bootz $loadaddr - $fdtaddr\0" +#endif + /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ diff --git a/include/configs/olimex_am335x_som.h b/include/configs/olimex_am335x_som.h new file mode 100644 index 0000000000..3f26314811 --- /dev/null +++ b/include/configs/olimex_am335x_som.h @@ -0,0 +1,166 @@ +/* + * olimex_am355x_som.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) ~2016 olimex + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __CONFIG_OLIMEX_AM335x_SOM_H +#define __CONFIG_OLIMEX_AM335x_SOM_H + +#include <linux/sizes.h> +#include <configs/ti_am335x_common.h> + +#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ +#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM + +/* Clock Defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#ifdef CONFIG_NAND +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ +#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 +#endif +#define NANDARGS \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,512\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ + "nand read ${loadaddr} NAND.kernel; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" +#else +#define NANDARGS "" +#endif + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + "boot_fdt=try\0" \ + "bootpart=0:1\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "fdtfile=undefined\0" \ + "console=ttyO0,115200n8\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p1 rw\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "rootpath=/export/rootfs\0" \ + "nfsopts=nolock\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "${mtdparts} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "bootenv=uEnv.txt\0" \ + "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "mmcloados=run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "mmcboot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run mmcloados;" \ + "fi;" \ + "fi;\0" \ + NANDARGS + /*DFUARGS*/ +#endif + +/* NS16550 Configuration */ +#define CONFIG_SYS_NS16550_COM1 0x44e09000 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_CONS_INDEX 1 + +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_BOOT +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_NAND_OMAP_GPMC_PREFETCH +#define CONFIG_NAND_OMAP_ELM +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#endif + +/* NAND support */ +#ifdef CONFIG_NAND +#define CONFIG_CMD_NAND +#define GPMC_NAND_ECC_LP_x8_LAYOUT 1 +#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT) +#define MTDIDS_DEFAULT "nand0=nand.0" +#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ + "128k(NAND.SPL)," \ + "128k(NAND.SPL.backup1)," \ + "128k(NAND.SPL.backup2)," \ + "128k(NAND.SPL.backup3)," \ + "256k(NAND.u-boot-spl-os)," \ + "1m(NAND.u-boot)," \ + "128k(NAND.u-boot-env)," \ + "128k(NAND.u-boot-env.backup1)," \ + "8m(NAND.kernel)," \ + "-(NAND.file-system)" +#endif +#endif + +#endif /* ! __CONFIG_OLIMEX_AM335x_SOM_H */ |