diff options
Diffstat (limited to 'arch/arm/cpu/arm926ejs/davinci')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/config.mk | 32 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/et1011c.c | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/psc.c | 4 |
4 files changed, 9 insertions, 41 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/config.mk b/arch/arm/cpu/arm926ejs/davinci/config.mk deleted file mode 100644 index 565adda11d..0000000000 --- a/arch/arm/cpu/arm926ejs/davinci/config.mk +++ /dev/null @@ -1,32 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <gj@denx.de> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float - -PLATFORM_CPPFLAGS += -march=armv5te -# ========================================================================= -# -# Supply options according to compiler version -# -# ========================================================================= -PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/arch/arm/cpu/arm926ejs/davinci/et1011c.c b/arch/arm/cpu/arm926ejs/davinci/et1011c.c index da073457a3..df35e44d13 100644 --- a/arch/arm/cpu/arm926ejs/davinci/et1011c.c +++ b/arch/arm/cpu/arm926ejs/davinci/et1011c.c @@ -39,11 +39,9 @@ int et1011c_get_link_speed(int phy_addr) u_int16_t data; if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) { - davinci_eth_phy_read(EMAC_MDIO_PHY_NUM, - MII_PHY_CONFIG_REG, &data); + davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data); /* Enable 125MHz clock sourced from PHY */ - davinci_eth_phy_write(EMAC_MDIO_PHY_NUM, - MII_PHY_CONFIG_REG, + davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG, data | PHY_SYS_CLK_EN); return (1); } diff --git a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S index 0a4b2cf674..7a169b1076 100644 --- a/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S @@ -45,6 +45,8 @@ #include <config.h> +#define MDSTAT_STATE 0x3f + .globl lowlevel_init lowlevel_init: @@ -268,7 +270,7 @@ checkStatClkStop: checkDDRStatClkStop: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $MDSTAT_STATE cmp r7, $0x03 bne checkDDRStatClkStop @@ -343,7 +345,7 @@ checkStatClkStop2: checkDDRStatClkStop2: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $MDSTAT_STATE cmp r7, $0x01 bne checkDDRStatClkStop2 @@ -374,7 +376,7 @@ checkStatClkEn2: checkDDRStatClkEn2: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $MDSTAT_STATE cmp r7, $0x03 bne checkDDRStatClkEn2 diff --git a/arch/arm/cpu/arm926ejs/davinci/psc.c b/arch/arm/cpu/arm926ejs/davinci/psc.c index 8273a7fae4..707fa47e31 100644 --- a/arch/arm/cpu/arm926ejs/davinci/psc.c +++ b/arch/arm/cpu/arm926ejs/davinci/psc.c @@ -83,7 +83,7 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - if ((readl(mdstat) & 0x1f) == 0x03) + if ((readl(mdstat) & PSC_MDSTAT_STATE) == 0x03) return; /* Already on and enabled */ writel(readl(mdctl) | 0x03, mdctl); @@ -114,7 +114,7 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - while ((readl(mdstat) & 0x1f) != 0x03) + while ((readl(mdstat) & PSC_MDSTAT_STATE) != 0x03) continue; } |