5 files changed, 66 insertions, 79 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile
index 6beafbbece..7768912603 100644
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -16,8 +16,6 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).o
 
-SOBJS	:= lowlevel_init.o
-
 COBJS	+= clock.o
 COBJS	+= sys_info.o
 COBJS	+= ddr.o
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index 312643c777..d64ae6936c 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -19,19 +19,31 @@
 #include <common.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/omap.h>
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/common_def.h>
 #include <asm/io.h>
+#include <asm/omap_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
 struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
+struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
+
+/* UART Defines */
+#ifdef CONFIG_SPL_BUILD
+#define UART_RESET		(0x1 << 1)
+#define UART_CLK_RUNNING_MASK	0x1
+#define UART_SMART_IDLE_EN	(0x1 << 0x3)
+#endif
 
 /*
  * early system init of muxing and clocks.
  */
-void s_init(u32 in_ddr)
+void s_init(void)
 {
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
@@ -43,12 +55,37 @@ void s_init(u32 in_ddr)
 	while (readl(&wdtimer->wdtwwps) != 0x0)
 		;
 
+#ifdef CONFIG_SPL_BUILD
 	/* Setup the PLLs and the clocks for the peripherals */
-#ifdef CONFIG_SETUP_PLL
 	pll_init();
+
+	/* UART softreset */
+	u32 regVal;
+
+	enable_uart0_pin_mux();
+
+	regVal = readl(&uart_base->uartsyscfg);
+	regVal |= UART_RESET;
+	writel(regVal, &uart_base->uartsyscfg);
+	while ((readl(&uart_base->uartsyssts) &
+		UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
+		;
+
+	/* Disable smart idle */
+	regVal = readl(&uart_base->uartsyscfg);
+	regVal |= UART_SMART_IDLE_EN;
+	writel(regVal, &uart_base->uartsyscfg);
+
+	/* Initialize the Timer */
+	init_timer();
+
+	preloader_console_init();
+
+	config_ddr();
 #endif
-	if (!in_ddr)
-		config_ddr();
+
+	/* Enable MMC0 */
+	enable_mmc0_pin_mux();
 }
 
 /* Initialize timer */
@@ -71,3 +108,9 @@ int board_mmc_init(bd_t *bis)
 	return omap_mmc_init(0);
 }
 #endif
+
+void setup_clocks_for_console(void)
+{
+	/* Not yet implemented */
+	return;
+}
diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk
new file mode 100644
index 0000000000..5750bbdcb6
--- /dev/null
+++ b/arch/arm/cpu/armv7/am33xx/config.mk
@@ -0,0 +1,18 @@
+#
+# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed "as is" WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+ifdef CONFIG_SPL_BUILD
+ALL-y	+= $(OBJTREE)/MLO
+else
+ALL-y	+= $(obj)u-boot.img
+endif
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 1318365a4a..2f4164df82 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -46,7 +46,7 @@ void dram_init_banksize(void)
 }
 
 
-#ifdef CONFIG_AM335X_CONFIG_DDR
+#ifdef CONFIG_SPL_BUILD
 static void data_macro_config(int dataMacroNum)
 {
 	struct ddr_data data;
diff --git a/arch/arm/cpu/armv7/am33xx/lowlevel_init.S b/arch/arm/cpu/armv7/am33xx/lowlevel_init.S
deleted file mode 100644
index 17c962ff71..0000000000
--- a/arch/arm/cpu/armv7/am33xx/lowlevel_init.S
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * lowlevel_init.S
- *
- * AM33XX low level initialization.
- *
- * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
- *
- * Initial Code by:
- * Mansoor Ahamed  <mansoor.ahamed@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <config.h>
-#include <asm/arch/hardware.h>
-
-_mark1:
-	.word mark1
-_lowlevel_init1:
-	.word lowlevel_init
-_s_init_start:
-	.word s_init_start
-
-_TEXT_BASE:
-	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
-
-/*****************************************************************************
- * lowlevel_init: - Platform low level init.
- ****************************************************************************/
-.globl lowlevel_init
-lowlevel_init:
-
-	/* The link register is saved in ip by start.S */
-	mov r6, ip
-	/* check if we are already running from RAM */
-	ldr r2, _lowlevel_init1
-	ldr r3, _TEXT_BASE
-	sub r4, r2, r3
-	sub r0, pc, r4
-	ldr sp, SRAM_STACK
-mark1:
-	ldr r5, _mark1
-	sub r5, r5, r2 /* bytes between mark1 and lowlevel_init */
-	sub r0, r0, r5 /* r0 <- _start w.r.t current place of execution */
-	mov r10, #0x0 /* r10 has in_ddr used by s_init() */
-
-	ands r0, r0, #0xC0000000
-	/* MSB 2 bits <> 0 then we are in ocmc or DDR */
-	cmp r0, #0x80000000
-	bne s_init_start
-	mov r10, #0x01
-	b s_init_start
-
-s_init_start:
-	mov r0, r10 /* passing in_ddr in r0 */
-	bl s_init
-	/* back to arch calling code */
-	mov pc, r6
-	/* the literal pools origin */
-	.ltorg
-
-SRAM_STACK:
-	/* Place stack at the top */
-	.word LOW_LEVEL_SRAM_STACK