diff options
Diffstat (limited to 'arch/arm/cpu/armv7/mx5')
| -rw-r--r-- | arch/arm/cpu/armv7/mx5/lowlevel_init.S | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 94de9f1d61..6c66b42619 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -121,6 +121,35 @@ beq 1b .endm +.macro setup_pll_errata pll, freq + ldr r2, =\pll + mov r1, #0x0 + str r1, [r2, #PLL_DP_CONFIG] /* Disable auto-restart AREN bit */ + ldr r1, =0x00001236 + str r1, [r2, #PLL_DP_CTL] /* Restart PLL with PLM=1 */ +1: ldr r1, [r2, #PLL_DP_CTL] /* Wait for lock */ + ands r1, r1, #0x1 + beq 1b + + ldr r5, \freq + str r5, [r2, #PLL_DP_MFN] /* Modify MFN value */ + str r5, [r2, #PLL_DP_HFS_MFN] + + mov r1, #0x1 + str r1, [r2, #PLL_DP_CONFIG] /* Reload MFN value */ + +2: ldr r1, [r2, #PLL_DP_CONFIG] + tst r1, #1 + bne 2b + + ldr r1, =100 /* Wait at least 4 us */ +3: subs r1, r1, #1 + bge 3b + + mov r1, #0x2 + str r1, [r2, #PLL_DP_CONFIG] /* Enable auto-restart AREN bit */ +.endm + .macro init_clock ldr r0, =CCM_BASE_ADDR @@ -157,7 +186,12 @@ mov r1, #0x4 str r1, [r0, #CLKCTL_CCSR] +#if defined(CONFIG_MX51_PLL_ERRATA) + setup_pll PLL1_BASE_ADDR, 864 + setup_pll_errata PLL1_BASE_ADDR, W_DP_MFN_800_DIT +#else setup_pll PLL1_BASE_ADDR, 800 +#endif #if defined(CONFIG_MX51) setup_pll PLL3_BASE_ADDR, 665 @@ -287,6 +321,10 @@ lowlevel_init: mov pc,lr /* Board level setting value */ +W_DP_OP_864: .word DP_OP_864 +W_DP_MFD_864: .word DP_MFD_864 +W_DP_MFN_864: .word DP_MFN_864 +W_DP_MFN_800_DIT: .word DP_MFN_800_DIT W_DP_OP_800: .word DP_OP_800 W_DP_MFD_800: .word DP_MFD_800 W_DP_MFN_800: .word DP_MFN_800 |