diff options
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c')
-rw-r--r-- | arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c b/arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c index 979bb3c817..ebba438319 100644 --- a/arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c +++ b/arch/arm/cpu/armv7/sunxi/dram_sun8i_a33.c @@ -14,12 +14,12 @@ #include <asm/arch/clock.h> #include <asm/arch/dram.h> #include <asm/arch/prcm.h> +#include <linux/kconfig.h> /* PLL runs at 2x dram-clk, controller runs at PLL / 4 (dram-clk / 2) */ #define DRAM_CLK_MUL 2 #define DRAM_CLK_DIV 4 #define DRAM_SIGMA_DELTA_ENABLE 1 -#define DRAM_ODT_EN 0 struct dram_para { u8 cs1; @@ -215,7 +215,7 @@ static int mctl_channel_init(struct dram_para *para) clrbits_le32(&mctl_ctl->pgcr0, 0x3f << 0); /* Set ODT */ - if ((CONFIG_DRAM_CLK > 400) && DRAM_ODT_EN) { + if ((CONFIG_DRAM_CLK > 400) && IS_ENABLED(CONFIG_DRAM_ODT_EN)) { setbits_le32(DXnGCR0(0), 0x3 << 9); setbits_le32(DXnGCR0(1), 0x3 << 9); } else { |