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-rw-r--r--arch/arm/cpu/armv7/u8500/Makefile46
-rw-r--r--arch/arm/cpu/armv7/u8500/clock.c56
-rw-r--r--arch/arm/cpu/armv7/u8500/lowlevel.S35
-rw-r--r--arch/arm/cpu/armv7/u8500/timer.c154
4 files changed, 291 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/u8500/Makefile b/arch/arm/cpu/armv7/u8500/Makefile
new file mode 100644
index 0000000000..270aa40c88
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(SOC).o
+
+COBJS = timer.o clock.o
+SOBJS = lowlevel.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all: $(obj).depend $(LIB)
+
+$(LIB): $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
new file mode 100644
index 0000000000..9e3b87394d
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2009 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct clkrst {
+ unsigned int pcken;
+ unsigned int pckdis;
+ unsigned int kcken;
+ unsigned int kckdis;
+};
+
+static unsigned int clkrst_base[] = {
+ U8500_CLKRST1_BASE,
+ U8500_CLKRST2_BASE,
+ U8500_CLKRST3_BASE,
+ 0,
+ U8500_CLKRST5_BASE,
+ U8500_CLKRST6_BASE,
+ U8500_CLKRST7_BASE, /* ED only */
+};
+
+/* Turn on peripheral clock at PRCC level */
+void u8500_clock_enable(int periph, int cluster, int kern)
+{
+ struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];
+
+ if (kern != -1)
+ writel(1 << kern, &clkrst->kcken);
+
+ if (cluster != -1)
+ writel(1 << cluster, &clkrst->pcken);
+}
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
new file mode 100644
index 0000000000..743071c569
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <config.h>
+
+.globl lowlevel_init
+lowlevel_init:
+ mov pc, lr
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+ ldr r0, =CFG_PRCMU_BASE
+ ldr r1, =0x1
+ str r1, [r0, #0x228]
+_loop_forever:
+ b _loop_forever
diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c
new file mode 100644
index 0000000000..8e96eaa771
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/timer.c
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2010 Linaro Limited
+ * John Rigby <john.rigby@linaro.org>
+ *
+ * Based on original from Linux kernel source and
+ * internal ST-Ericsson U-Boot source.
+ * (C) Copyright 2009 Alessandro Rubini
+ * (C) Copyright 2010 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * The MTU device has some interrupt control registers
+ * followed by 4 timers.
+ */
+
+/* The timers */
+struct u8500_mtu_timer {
+ u32 lr; /* Load value */
+ u32 cv; /* Current value */
+ u32 cr; /* Control reg */
+ u32 bglr; /* ??? */
+};
+
+/* The MTU that contains the timers */
+struct u8500_mtu {
+ u32 imsc; /* Interrupt mask set/clear */
+ u32 ris; /* Raw interrupt status */
+ u32 mis; /* Masked interrupt status */
+ u32 icr; /* Interrupt clear register */
+ struct u8500_mtu_timer pt[4];
+};
+
+/* bits for the control register */
+#define MTU_CR_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR */
+#define MTU_CR_32BITS 0x02
+
+#define MTU_CR_PRESCALE_1 0x00
+#define MTU_CR_PRESCALE_16 0x04
+#define MTU_CR_PRESCALE_256 0x08
+#define MTU_CR_PRESCALE_MASK 0x0c
+
+#define MTU_CR_PERIODIC 0x40 /* if 0 = free-running */
+#define MTU_CR_ENA 0x80
+
+/*
+ * The MTU is clocked at 133 MHz by default. (V1 and later)
+ */
+#define TIMER_CLOCK (133 * 1000 * 1000 / 16)
+#define COUNT_TO_USEC(x) ((x) * 16 / 133)
+#define USEC_TO_COUNT(x) ((x) * 133 / 16)
+#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
+#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
+#define TIMER_LOAD_VAL 0xffffffff
+
+/*
+ * MTU timer to use (from 0 to 3).
+ */
+#define MTU_TIMER 2
+
+static struct u8500_mtu_timer *timer_base =
+ &((struct u8500_mtu *)U8500_MTU0_BASE_V1)->pt[MTU_TIMER];
+
+/* macro to read the 32 bit timer: since it decrements, we invert read value */
+#define READ_TIMER() (~readl(&timer_base->cv))
+
+/* Configure a free-running, auto-wrap counter with /16 prescaler */
+int timer_init(void)
+{
+ writel(MTU_CR_ENA | MTU_CR_PRESCALE_16 | MTU_CR_32BITS,
+ &timer_base->cr);
+ return 0;
+}
+
+ulong get_timer_masked(void)
+{
+ /* current tick value */
+ ulong now = TICKS_TO_HZ(READ_TIMER());
+
+ if (now >= gd->lastinc) /* normal (non rollover) */
+ gd->tbl += (now - gd->lastinc);
+ else /* rollover */
+ gd->tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + now;
+ gd->lastinc = now;
+ return gd->tbl;
+}
+
+/* Delay x useconds */
+void __udelay(ulong usec)
+{
+ long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
+ ulong now, last = READ_TIMER();
+
+ while (tmo > 0) {
+ now = READ_TIMER();
+ if (now > last) /* normal (non rollover) */
+ tmo -= now - last;
+ else /* rollover */
+ tmo -= TIMER_LOAD_VAL - last + now;
+ last = now;
+ }
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void set_timer(ulong t)
+{
+ gd->tbl = t;
+}
+
+/*
+ * Emulation of Power architecture long long timebase.
+ *
+ * TODO: Support gd->tbu for real long long timebase.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * Emulation of Power architecture timebase.
+ * NB: Low resolution compared to Power tbclk.
+ */
+ulong get_tbclk(void)
+{
+ return CONFIG_SYS_HZ;
+}
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